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authorAaron Durbin <adurbin@chromium.org>2018-04-21 14:45:32 -0600
committerAaron Durbin <adurbin@chromium.org>2018-04-24 14:37:59 +0000
commit6403167d290da235a732bd2d6157aa2124fb403a (patch)
tree9c4805af37a31830934f91098d299e967df930c6 /src/southbridge
parent38fd6685e9da61daadc96a8d537e6966dfe3b219 (diff)
downloadcoreboot-6403167d290da235a732bd2d6157aa2124fb403a.tar.xz
compiler.h: add __weak macro
Instead of writing out '__attribute__((weak))' use a shorter form. Change-Id: If418a1d55052780077febd2d8f2089021f414b91 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/sb700/sata.c5
-rw-r--r--src/southbridge/intel/common/smihandler.c5
-rw-r--r--src/southbridge/via/vt8237r/ide.c3
3 files changed, 8 insertions, 5 deletions
diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
index 537c2c08b4..2045d52f2d 100644
--- a/src/southbridge/amd/sb700/sata.c
+++ b/src/southbridge/amd/sb700/sata.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <delay.h>
@@ -66,7 +67,7 @@ static int sata_drive_detect(int portnum, uint16_t iobar)
}
/* This function can be overloaded in mainboard.c */
-void __attribute__((weak)) sb7xx_51xx_setup_sata_phys(struct device *dev)
+void __weak sb7xx_51xx_setup_sata_phys(struct device *dev)
{
/* RPR7.6.1 Program the PHY Global Control to 0x2C00 */
pci_write_config16(dev, 0x86, 0x2c00);
@@ -89,7 +90,7 @@ void __attribute__((weak)) sb7xx_51xx_setup_sata_phys(struct device *dev)
}
/* This function can be overloaded in mainboard.c */
-void __attribute__((weak)) sb7xx_51xx_setup_sata_port_indication(void *sata_bar5)
+void __weak sb7xx_51xx_setup_sata_port_indication(void *sata_bar5)
{
uint32_t dword;
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 0e372d69da..17fae11db3 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -17,6 +17,7 @@
#include <types.h>
#include <arch/io.h>
#include <arch/acpi.h>
+#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
@@ -108,11 +109,11 @@ static void busmaster_disable_on_bus(int bus)
}
}
-__attribute__((weak)) void southbridge_gate_memory_reset(void)
+__weak void southbridge_gate_memory_reset(void)
{
}
-__attribute__((weak)) void southbridge_smm_xhci_sleep(u8 slp_type)
+__weak void southbridge_smm_xhci_sleep(u8 slp_type)
{
}
diff --git a/src/southbridge/via/vt8237r/ide.c b/src/southbridge/via/vt8237r/ide.c
index 457917174d..e500c2cbdf 100644
--- a/src/southbridge/via/vt8237r/ide.c
+++ b/src/southbridge/via/vt8237r/ide.c
@@ -15,6 +15,7 @@
/* Based on other VIA SB code. */
+#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -25,7 +26,7 @@
/**
* Cable type detect function, weak so it can be overloaded in mainboard.c
*/
-u32 __attribute__((weak)) vt8237_ide_80pin_detect(struct device *dev)
+u32 __weak vt8237_ide_80pin_detect(struct device *dev)
{
struct southbridge_via_vt8237r_config *sb =
(struct southbridge_via_vt8237r_config *)dev->chip_info;