diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-12 22:06:09 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-14 09:30:24 +0000 |
commit | 68c851bcd702e7816cdb6e504f7386ec404ecf13 (patch) | |
tree | 4f54fa935d738ff5e6fc473ba37bfc03a8ecb2ef /src/southbridge | |
parent | c8a649c08f92d4d2255626da4e1cd7a6d71469e7 (diff) | |
download | coreboot-68c851bcd702e7816cdb6e504f7386ec404ecf13.tar.xz |
src: Get rid of device_t
Use of device_t is deprecated.
Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch_common.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/early_usb_mrc.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/common/spi.c | 5 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/pmutil.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/smihandler.c | 2 |
6 files changed, 11 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch_common.c b/src/southbridge/intel/bd82x6x/early_pch_common.c index 2ef47a2e46..f1ac4f0e77 100644 --- a/src/southbridge/intel/bd82x6x/early_pch_common.c +++ b/src/southbridge/intel/bd82x6x/early_pch_common.c @@ -66,9 +66,9 @@ int southbridge_detect_s3_resume(void) int rtc_failure(void) { #if defined(__SIMPLE_DEVICE__) - device_t dev = PCI_DEV(0, 0x1f, 0); + pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD); } diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c index 8fac3c7745..4b9061e800 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c @@ -32,8 +32,8 @@ */ void enable_usb_bar(void) { - device_t usb0 = PCH_EHCI1_DEV; - device_t usb1 = PCH_EHCI2_DEV; + pci_devfn_t usb0 = PCH_EHCI1_DEV; + pci_devfn_t usb1 = PCH_EHCI2_DEV; u32 cmd; /* USB Controller 1 */ diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 73c84bbb5d..7ff13a0928 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -36,7 +36,7 @@ int pch_silicon_revision(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif @@ -53,7 +53,7 @@ int pch_silicon_type(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index bd89025e4b..180a629e32 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -298,15 +298,14 @@ void spi_init(void) uint8_t *rcrb; /* Root Complex Register Block */ uint32_t rcba; /* Root Complex Base Address */ uint8_t bios_cntl; - device_t dev; ich9_spi_regs *ich9_spi; ich7_spi_regs *ich7_spi; uint16_t hsfs; #ifdef __SIMPLE_DEVICE__ - dev = PCI_DEV(0, 31, 0); + pci_devfn_t dev = PCI_DEV(0, 31, 0); #else - dev = dev_find_slot(0, PCI_DEVFN(31, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0)); #endif pci_read_config_dword(dev, 0xf0, &rcba); diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c index 00a6e65872..e96d683bb2 100644 --- a/src/southbridge/intel/lynxpoint/pmutil.c +++ b/src/southbridge/intel/lynxpoint/pmutil.c @@ -558,9 +558,9 @@ void disable_gpe(u32 mask) int rtc_failure(void) { #if defined(__SIMPLE_DEVICE__) - device_t dev = PCI_DEV(0, 31, 0); + pci_devfn_t dev = PCI_DEV(0, 31, 0); #else - device_t dev = dev_find_slot(0, PCI_DEVFN(31, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0)); #endif return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD); } diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index dcec3f0824..5cdd99d431 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -75,7 +75,7 @@ static void busmaster_disable_on_bus(int bus) for (slot = 0; slot < 0x20; slot++) { for (func = 0; func < 8; func++) { u32 reg32; - device_t dev = PCI_DEV(bus, slot, func); + pci_devfn_t dev = PCI_DEV(bus, slot, func); val = pci_read_config32(dev, PCI_VENDOR_ID); |