diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2010-04-23 20:58:13 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2010-04-23 20:58:13 +0000 |
| commit | 7ba3c4fa094921a856cf04dbcff982ecfc68d3be (patch) | |
| tree | ebdc3d460fa78ab02b51b2b8e1859678fd6dfe18 /src/southbridge | |
| parent | 116ec61844982961aab8f89f1dfee1572ffac843 (diff) | |
| download | coreboot-7ba3c4fa094921a856cf04dbcff982ecfc68d3be.tar.xz | |
Attached patch adds support for tinybootblock on VT8237* to decode whole flash
independent of strapping, making larger flashes work. We cannot walk anything
else than PCI bus 0 because HT is not setup yet.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/via/vt8237r/Kconfig | 5 | ||||
| -rw-r--r-- | src/southbridge/via/vt8237r/bootblock.c | 46 |
2 files changed, 51 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/Kconfig b/src/southbridge/via/vt8237r/Kconfig index 7fddeaa882..b569de9a97 100644 --- a/src/southbridge/via/vt8237r/Kconfig +++ b/src/southbridge/via/vt8237r/Kconfig @@ -25,3 +25,8 @@ config EPIA_VT8237R_INIT bool default n depends on SOUTHBRIDGE_VIA_VT8237R + +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/via/vt8237r/bootblock.c" + depends on SOUTHBRIDGE_VIA_VT8237R diff --git a/src/southbridge/via/vt8237r/bootblock.c b/src/southbridge/via/vt8237r/bootblock.c new file mode 100644 index 0000000000..0759f894bc --- /dev/null +++ b/src/southbridge/via/vt8237r/bootblock.c @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_ids.h> + +static void bootblock_southbridge_init(void) +{ + device_t dev; + /* don't walk other busses, HT is not enabled */ + + /* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */ + /* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */ + + /* Power management controller */ + dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); + + if (dev == PCI_DEV_INVALID) { + /* Power management controller */ + dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237S_LPC), 0); + + if (dev == PCI_DEV_INVALID) + return; + } + + pci_write_config8(dev, 0x41, 0x7f); +} |