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authorFurquan Shaikh <furquan@chromium.org>2017-05-17 19:14:06 -0700
committerFurquan Shaikh <furquan@google.com>2017-05-19 21:23:11 +0200
commita1491574ef2c91ff8b89df70feba67ad34836c75 (patch)
tree6bba1c05f7bf87eb5cdac4c2a884d37cff59b6a5 /src/southbridge
parentbd9e32efdd8f06063c9ee37dd6d0bebf535b86c1 (diff)
downloadcoreboot-a1491574ef2c91ff8b89df70feba67ad34836c75.tar.xz
drivers/spi/spi_flash: Clean up SPI flash probe
1. Rename __spi_flash_probe to spi_flash_generic_probe and export it so that drivers can use it outside spi_flash.c. 2. Make southbridge intel spi driver use spi_flash_generic_probe if spi_is_multichip returns 0. 3. Add spi_flash_probe to spi_ctrlr structure to allow platforms to provide specialized probe functions. With this change, the specialized spi flash probe functions are now associated with a particular spi ctrlr structure and no longer disconnected from the spi controller. BUG=b:38330715 Change-Id: I35f3bd8ddc5e71515df3ef0c1c4b1a68ee56bf4b Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/common/spi.c43
1 files changed, 20 insertions, 23 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 110c29c20d..79b1db7de7 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -653,20 +653,6 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
-static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
- .xfer_vector = spi_xfer_two_vectors,
- .max_xfer_size = member_size(ich9_spi_regs, fdata),
-};
-
-int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
-{
- slave->bus = bus;
- slave->cs = cs;
- slave->ctrlr = &spi_ctrlr;
- return 0;
-}
-
/* Sets FLA in FADDR to (addr & 0x01FFFFFF) without touching other bits. */
static void ich_hwseq_set_addr(uint32_t addr)
{
@@ -899,18 +885,14 @@ static int ich_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len,
return 0;
}
-int spi_flash_programmer_probe(const struct spi_slave *spi,
- int force, struct spi_flash *flash)
+static int spi_flash_programmer_probe(const struct spi_slave *spi,
+ struct spi_flash *flash)
{
uint32_t flcomp;
- /*
- * Perform SPI flash probing only if:
- * 1. spi_is_multichip returns 1 or
- * 2. Specialized probing is forced by SPI flash driver.
- */
- if (!spi_is_multichip() && !force)
- return -1;
+ /* Try generic probing first if spi_is_multichip returns 0. */
+ if (!spi_is_multichip() && !spi_flash_generic_probe(spi, flash))
+ return 0;
memcpy(&flash->spi, spi, sizeof(*spi));
flash->name = "Opaque HW-sequencing";
@@ -946,3 +928,18 @@ int spi_flash_programmer_probe(const struct spi_slave *spi,
return 0;
}
+
+static const struct spi_ctrlr spi_ctrlr = {
+ .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
+ .max_xfer_size = member_size(ich9_spi_regs, fdata),
+ .flash_probe = spi_flash_programmer_probe,
+};
+
+int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
+{
+ slave->bus = bus;
+ slave->cs = cs;
+ slave->ctrlr = &spi_ctrlr;
+ return 0;
+}