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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-06 11:54:10 -0600 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-07 21:30:57 +0000 |
| commit | a34b78c981dd8b69f43c2a8c5c582db68f5e5b40 (patch) | |
| tree | 21c23367b50982b048c67c2160af73672db72100 /src/southbridge | |
| parent | 7775d67218579b268d0966ba2f0f0adb252b381c (diff) | |
| download | coreboot-a34b78c981dd8b69f43c2a8c5c582db68f5e5b40.tar.xz | |
sb/amd/sb700: Fix misleading formatting
Change-Id: I65872d6f1d71d050c8589d3616340648cf95048b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/sb700/sm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c index 6b7ce68a1a..66316828ba 100644 --- a/src/southbridge/amd/sb700/sm.c +++ b/src/southbridge/amd/sb700/sm.c @@ -306,7 +306,7 @@ static void sm_init(struct device *dev) } byte = pci_read_config8(dev, 0xAE); if (CONFIG(ENABLE_APIC_EXT_ID)) - byte |= 1 << 4; + byte |= 1 << 4; byte |= 1 << 5; /* ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER */ byte |= 1 << 6; /* Enable arbiter between APIC and PIC interrupts */ pci_write_config8(dev, 0xAE, byte); |