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authorYinghai Lu <yinghailu@gmail.com>2004-10-27 00:37:30 +0000
committerYinghai Lu <yinghailu@gmail.com>2004-10-27 00:37:30 +0000
commiteefdb038981a0fcc93df5c6c934f8138a43873bb (patch)
tree0e1d463b681d3ed4294230a707afce19f81f994c /src/southbridge
parentfb198640d8ba755b7022800d0077c41dceae1b94 (diff)
downloadcoreboot-eefdb038981a0fcc93df5c6c934f8138a43873bb.tar.xz
S2885 winbond Superio all resource set
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_usb.c12
-rw-r--r--src/southbridge/amd/amd8151/amd8151_agp3.c5
2 files changed, 8 insertions, 9 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_usb.c b/src/southbridge/amd/amd8111/amd8111_usb.c
index 2fec77bb17..f1ff4b1e4e 100644
--- a/src/southbridge/amd/amd8111/amd8111_usb.c
+++ b/src/southbridge/amd/amd8111/amd8111_usb.c
@@ -6,21 +6,16 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <device/chip.h>
-#include <device/smbus.h>
#include <arch/io.h>
#include "amd8111.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
- pci_write_config32(dev, 0x44,
+ pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
}
-static struct smbus_bus_operations lops_smbus_bus = {
- /* I haven't seen the 2.0 SMBUS controller used yet. */
-};
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
@@ -30,13 +25,12 @@ static struct device_operations smbus_ops = {
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = scan_static_bus,
- .enable = amd8111_enable,
+// .enable = amd8111_enable,
.ops_pci = &lops_pci,
- .ops_smbus_bus = &lops_smbus_bus,
};
static struct pci_driver smbus_driver __pci_driver = {
.ops = &smbus_ops,
.vendor = PCI_VENDOR_ID_AMD,
- .device = PCI_DEVICE_ID_AMD_8111_SMB,
+ .device = PCI_DEVICE_ID_AMD_8111_USB,
};
diff --git a/src/southbridge/amd/amd8151/amd8151_agp3.c b/src/southbridge/amd/amd8151/amd8151_agp3.c
index dfb8a5592b..c54849bb51 100644
--- a/src/southbridge/amd/amd8151/amd8151_agp3.c
+++ b/src/southbridge/amd/amd8151/amd8151_agp3.c
@@ -54,6 +54,10 @@ static void agp3dev_enable(device_t dev)
#endif
}
+static struct pci_operations pci_ops_pci_dev = {
+ .set_subsystem = pci_dev_set_subsystem,
+};
+
static struct device_operations agp3dev_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
@@ -61,6 +65,7 @@ static struct device_operations agp3dev_ops = {
.init = 0,
.scan_bus = 0,
.enable = agp3dev_enable,
+ .ops_pci = &pci_ops_pci_dev,
};
static struct pci_driver agp3dev_driver __pci_driver = {