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| author | Patrick Georgi <patrick.georgi@secunet.com> | 2011-10-28 09:01:54 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-28 22:15:19 +0200 |
| commit | 0f8590f9ca8026af62efa510a1c717d2d0729e3d (patch) | |
| tree | db53047fd77fe55dfea8d5f9804d725c1b67fca4 /src/southbridge | |
| parent | 5ed8cc0d62b25ee0fb014ccd8726836b1a99d87f (diff) | |
| download | coreboot-0f8590f9ca8026af62efa510a1c717d2d0729e3d.tar.xz | |
sb600: Implement EHCI workaround
Linux implements it itself, but older Linuxes and other systems
might not. Without this, the host controller might not respond
to drivers.
Change-Id: I4ff0e3683c02e7aa00d188428847c64c4c5d589d
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/345
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/sb600/usb.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/amd/sb600/usb.c b/src/southbridge/amd/sb600/usb.c index 7539f083c6..7ff8f5c9a4 100644 --- a/src/southbridge/amd/sb600/usb.c +++ b/src/southbridge/amd/sb600/usb.c @@ -119,6 +119,11 @@ static void usb_init2(struct device *dev) dword &= ~(1 << 28); pci_write_config32(dev, 0x50, dword); + /* EHCI Erratum (adapted from Linux) */ + dword = pci_read_config32(dev, 0x53); + dword |= (1 << 3); + pci_write_config32(dev, 0x53, dword); + /* RPR5.14 Disable USB PHY PLL Reset signal to come from ACPI */ byte = pci_read_config8(dev, 0x54); byte &= ~(1 << 0); |