Random fixes for TI pci1x2x / Nokia IP530 / others.

 - nokia/ip530/devicetree.cb, southbridge/ti/pci1x2x/pci1x2x.c:
   - Fix SMSC FDC37B787 name (was a typo).
   - Disable PS/2 keyboard/mouse LDN, the IP530 doesn't have either.
   - Fix typo: s/PCI_DEVICE_ID_TI_1420/PCI_DEVICE_ID_TI_1520/.
   - All of these are confirmed by Marc Bertens on IRC.
 
 - Fix a few CHIP_NAME HP board names.
 
 - Random whitespace and coding-style fixes.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 38 insertions, 36 deletions

diff --git a/src/southbridge/ti/pci1x2x/pci1x2x.c b/src/southbridge/ti/pci1x2x/pci1x2x.c
index 01aeb6d69f..63a0646e88 100644
--- a/src/southbridge/ti/pci1x2x/pci1x2x.c
+++ b/src/southbridge/ti/pci1x2x/pci1x2x.c
@@ -24,41 +24,43 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 
-#if (	!defined( CONFIG_TI_PCMCIA_CARDBUS_CMDR ) || \
-	!defined( CONFIG_TI_PCMCIA_CARDBUS_CLSR ) || \
-	!defined( CONFIG_TI_PCMCIA_CARDBUS_CLTR	) || \
-	!defined( CONFIG_TI_PCMCIA_CARDBUS_BCR ) || \
-	!defined( CONFIG_TI_PCMCIA_CARDBUS_SCR ) || \
-	!defined( CONFIG_TI_PCMCIA_CARDBUS_MRR ) )
+#if (!defined(CONFIG_TI_PCMCIA_CARDBUS_CMDR) || \
+     !defined(CONFIG_TI_PCMCIA_CARDBUS_CLSR) || \
+     !defined(CONFIG_TI_PCMCIA_CARDBUS_CLTR) || \
+     !defined(CONFIG_TI_PCMCIA_CARDBUS_BCR) || \
+     !defined(CONFIG_TI_PCMCIA_CARDBUS_SCR) || \
+     !defined(CONFIG_TI_PCMCIA_CARDBUS_MRR))
 #error "you must supply these values in your mainboard-specific Kconfig file"
 #endif
 
 static void ti_pci1x2y_init(struct device *dev)
 {
 	printk(BIOS_INFO, "Init of Texas Instruments PCI1x2x PCMCIA/CardBus controller\n");
-	// Command register (offset 04)
-	pci_write_config16( dev, 0x04, CONFIG_TI_PCMCIA_CARDBUS_CMDR );
-	// Cache Line Size Register (offset 0x0C)
-	pci_write_config8( dev, 0x0C, CONFIG_TI_PCMCIA_CARDBUS_CLSR );
-	// CardBus latency timer register (offset 1B)
-	pci_write_config8( dev, 0x1B, CONFIG_TI_PCMCIA_CARDBUS_CLTR );
-	// Bridge control register (offset 3E)
-	pci_write_config16( dev, 0x3E, CONFIG_TI_PCMCIA_CARDBUS_BCR );
-	/** Enable change sub-vendor id
-	 * Clear the bit 5 to enable to write to the sub-vendor/device ids at 40 and 42 */
-	pci_write_config32( dev, 0x80, 0x10 );
-	pci_write_config32( dev, 0x40, PCI_VENDOR_ID_NOKIA );
-	// Now write the correct value for SCR
-	// System Control Register (offset 0x80)
-	pci_write_config32( dev, 0x80, CONFIG_TI_PCMCIA_CARDBUS_SCR );
-	// Multifunction routing register
-	pci_write_config32( dev, 0x8C, CONFIG_TI_PCMCIA_CARDBUS_MRR );
-	// Set Device Control Register (0x92) accordingly
-	pci_write_config8( dev, 0x92, pci_read_config8( dev, 0x92 ) | 0x02 );
-	return;
+
+	/* Command (offset 04) */
+	pci_write_config16(dev, 0x04, CONFIG_TI_PCMCIA_CARDBUS_CMDR);
+	/* Cache Line Size (offset 0x0C) */
+	pci_write_config8(dev, 0x0C, CONFIG_TI_PCMCIA_CARDBUS_CLSR);
+	/* CardBus latency timer (offset 0x1B) */
+	pci_write_config8(dev, 0x1B, CONFIG_TI_PCMCIA_CARDBUS_CLTR);
+	/* Bridge control (offset 0x3E) */
+	pci_write_config16(dev, 0x3E, CONFIG_TI_PCMCIA_CARDBUS_BCR);
+	/*
+	 * Enable change sub-vendor ID. Clear the bit 5 to enable to write
+	 * to the sub-vendor/device ids at 40 and 42.
+	 */
+	pci_write_config32(dev, 0x80, 0x10);
+	pci_write_config32(dev, 0x40, PCI_VENDOR_ID_NOKIA);
+	/* Now write the correct value for SCR. */
+	/* System control (offset 0x80) */
+	pci_write_config32(dev, 0x80, CONFIG_TI_PCMCIA_CARDBUS_SCR);
+	/* Multifunction routing */
+	pci_write_config32(dev, 0x8C, CONFIG_TI_PCMCIA_CARDBUS_MRR);
+	/* Set the device control register (0x92) accordingly. */
+	pci_write_config8(dev, 0x92, pci_read_config8(dev, 0x92) | 0x02);
 }
 
-static struct device_operations ti_pci1x2y_ops  = {
+static struct device_operations ti_pci1x2y_ops = {
 	.read_resources   = NULL, //pci_dev_read_resources,
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
@@ -67,19 +69,19 @@ static struct device_operations ti_pci1x2y_ops  = {
 };
 
 static const struct pci_driver ti_pci1225_driver __pci_driver = {
-        .ops    = &ti_pci1x2y_ops,
-        .vendor = PCI_VENDOR_ID_TI,
-        .device = PCI_DEVICE_ID_TI_1225,
+	.ops    = &ti_pci1x2y_ops,
+	.vendor = PCI_VENDOR_ID_TI,
+	.device = PCI_DEVICE_ID_TI_1225,
 };
 
 static const struct pci_driver ti_pci1420_driver __pci_driver = {
-        .ops    = &ti_pci1x2y_ops,
-        .vendor = PCI_VENDOR_ID_TI,
-        .device = PCI_DEVICE_ID_TI_1420,
+	.ops    = &ti_pci1x2y_ops,
+	.vendor = PCI_VENDOR_ID_TI,
+	.device = PCI_DEVICE_ID_TI_1420,
 };
 
 static const struct pci_driver ti_pci1520_driver __pci_driver = {
-        .ops    = &ti_pci1x2y_ops,
-        .vendor = PCI_VENDOR_ID_TI,
-        .device = PCI_DEVICE_ID_TI_1420,
+	.ops    = &ti_pci1x2y_ops,
+	.vendor = PCI_VENDOR_ID_TI,
+	.device = PCI_DEVICE_ID_TI_1520,
 };