summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-11-23 19:22:53 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-12-02 22:11:20 +0100
commit72dccce0c9a7cf59ca51a3174fc11eb8899e1761 (patch)
tree0201395e975f173ebc8badcc952598d559e8a745 /src/southbridge
parentbcfcfa4473357eb6272bc8bcc5e03f4ba517bcd2 (diff)
downloadcoreboot-72dccce0c9a7cf59ca51a3174fc11eb8899e1761.tar.xz
global: Fix usage of get_option() to make use of CB_CMOS_ codes
Do not directly check the return value of get_option, but instead compare the returned value against a CB_CMOS_ error code, or against CB_SUCCESS. Change-Id: I2fa7761d13ebb5e9b4606076991a43f18ae370ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4266 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/sb600/sata.c2
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c2
-rw-r--r--src/southbridge/via/vt8237r/lpc.c2
5 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c
index 8664483ad2..a17aab8df7 100644
--- a/src/southbridge/amd/sb600/sata.c
+++ b/src/southbridge/amd/sb600/sata.c
@@ -119,7 +119,7 @@ static void sata_init(struct device *dev)
pci_write_config8(dev, 0x40, byte);
// 1 means IDE, 0 means AHCI
- if( get_option(&i, "sata_mode") < 0 ) {
+ if (get_option(&i, "sata_mode") != CB_SUCCESS) {
// no cmos option
i = CONFIG_SATA_MODE;
}
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index cf4e132e3b..de09b165d6 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -116,7 +116,7 @@ static void i82801dx_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
pwr_on = MAINBOARD_POWER_ON;
reg8 = pci_read_config8(dev, GEN_PMCON_3);
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 9285080f19..b9caac6eaa 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -175,7 +175,7 @@ static void i82801gx_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
pwr_on = MAINBOARD_POWER_ON;
reg8 = pci_read_config8(dev, GEN_PMCON_3);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index bea0d98847..61a11b30db 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -181,7 +181,7 @@ static void i82801ix_power_options(device_t dev)
*
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/
- if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
pwr_on = MAINBOARD_POWER_ON;
reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3);
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 01d2a9c690..d8251a08fa 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -543,7 +543,7 @@ static void vt8237_common_init(struct device *dev)
}
/* configure power state of the board after loss of power */
- if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS)
pwr_on = 1;
enables = pci_read_config8(dev, 0x58);
pci_write_config8(dev, 0x58, enables & ~0x02);