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authorArthur Heymans <arthur@aheymans.xyz>2019-06-03 16:24:41 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-06-05 11:39:14 +0000
commit742df5ad34c0ad4d2bae2373ace6440c4cb6b792 (patch)
tree71763565a7854435392d238d922b073563da7f02 /src/southbridge
parentfbf380abac431b3b93ea180ee928b6b8f8dd8182 (diff)
downloadcoreboot-742df5ad34c0ad4d2bae2373ace6440c4cb6b792.tar.xz
sb/intel/i82801gx: Include chip.h directly
Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33171 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.h1
-rw-r--r--src/southbridge/intel/i82801gx/ide.c1
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801gx/pcie.c1
-rw-r--r--src/southbridge/intel/i82801gx/sata.c1
5 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index a91ffc500b..e44fcf5123 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -36,7 +36,6 @@
#if !defined(__ASSEMBLER__)
#if !defined(__PRE_RAM__)
-#include "chip.h"
#if !defined(__SIMPLE_DEVICE__)
void i82801gx_enable(struct device *dev);
#endif
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index a36237228c..672ee432fd 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
+#include "chip.h"
#include "i82801gx.h"
typedef struct southbridge_intel_i82801gx_config config_t;
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 948b6aa7f7..846a70997b 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -34,6 +34,7 @@
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/pmbase.h>
+#include "chip.h"
#include "i82801gx.h"
#include "nvs.h"
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index 3e5dbc3e87..0946a9aadf 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
+#include "chip.h"
#include "i82801gx.h"
/* Low Power variant has 6 root ports. */
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index 8514b6d3bf..b657513dcf 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
+#include "chip.h"
#include "i82801gx.h"
#include "sata.h"