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authorArthur Heymans <arthur@aheymans.xyz>2018-12-03 11:51:17 +0100
committerArthur Heymans <arthur@aheymans.xyz>2019-05-27 17:26:15 +0000
commit81e9b8ee67fe4f395e999200333a5214d1bf3789 (patch)
tree3962b767c54e4f570f0d9eda2d02066c0c60acdf /src/southbridge
parent97c7c6bbb6c9dd2ef4f917c3c4c16a8ff0de5d9f (diff)
downloadcoreboot-81e9b8ee67fe4f395e999200333a5214d1bf3789.tar.xz
sb/intel/common/smi.c: Remove unused functions
Since all targets using sb/intel/common and cpu/intel/smm/gen1 are now using PARALLEL_MP, some code is not used anymore. Change-Id: Ibdc2bb0f1412366b945813efbc1b6451d27f376f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30019 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/common/smi.c32
1 files changed, 0 insertions, 32 deletions
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index 036ac22adc..398c6804e0 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -104,38 +104,6 @@ void southbridge_smm_init(void)
write_pmbase32(SMI_EN, smi_en);
}
-void southbridge_trigger_smi(void)
-{
- /**
- * There are several methods of raising a controlled SMI# via
- * software, among them:
- * - Writes to io 0xb2 (APMC)
- * - Writes to the Local Apic ICR with Delivery mode SMI.
- *
- * Using the local apic is a bit more tricky. According to
- * AMD Family 11 Processor BKDG no destination shorthand must be
- * used.
- * The whole SMM initialization is quite a bit hardware specific, so
- * I'm not too worried about the better of the methods at the moment
- */
-
- /* raise an SMI interrupt */
- printk(BIOS_SPEW, " ... raise SMI#\n");
- outb(0x00, 0xb2);
-}
-
-void southbridge_clear_smi_status(void)
-{
- /* Clear SMI status */
- reset_smi_status();
-
- /* Clear PM1 status */
- reset_pm1_status();
-
- /* Set EOS bit so other SMIs can occur. */
- smi_set_eos();
-}
-
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
/*