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authorStefan Reinauer <stepan@openbios.org>2006-03-23 19:26:40 +0000
committerStefan Reinauer <stepan@openbios.org>2006-03-23 19:26:40 +0000
commit96f8fb5723d41c5908ef267e2386a08c26be28b0 (patch)
treef3a752369855457959cd74e7f565905a9c1a0092 /src/southbridge
parent1a971bddcfecec060d4357a65030cfe128ef790d (diff)
downloadcoreboot-96f8fb5723d41c5908ef267e2386a08c26be28b0.tar.xz
make older winbond chips work reliably.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_acpi.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c
index d652decefb..22cb003d97 100644
--- a/src/southbridge/amd/amd8111/amd8111_acpi.c
+++ b/src/southbridge/amd/amd8111/amd8111_acpi.c
@@ -122,6 +122,12 @@ static void acpi_init(struct device *dev)
pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
printk_info("set power %s after power fail\n", on?"on":"off");
+ /* switch serial irq logic from quiet mode to continuous
+ * mode for Winbond W83627HF Rev. 17
+ */
+ byte = pci_read_config8(dev, 0x4a);
+ pci_write_config8(dev, 0x4a, byte | (1<<6));
+
/* Throttle the CPU speed down for testing */
on = SLOW_CPU_OFF;
get_option(&on, "slow_cpu");