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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-10 15:15:05 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-23 14:46:36 +0000 |
| commit | f26693283655eff7c31275621439f8416eeb3242 (patch) | |
| tree | 6c4533fcd186faed76e8805d5fa33b171447f67c /src/southbridge | |
| parent | 6336d4c48d2f85629ff668da36711ea794f70ab5 (diff) | |
| download | coreboot-f26693283655eff7c31275621439f8416eeb3242.tar.xz | |
nb/intel/i945: Use parallel MP init
Use the parallel mp init path to initialize AP's. This should result
in a moderate speedup.
Tested on Intel D945GCLF (1 core 2 threads), still boots fine and is
26ms faster compared to lapic_cpu_init.
This removes the option to disable HT siblings.
Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/25600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index b20b2aa461..5ad05c73ad 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -353,7 +353,8 @@ static void i82801gx_lock_smm(struct device *dev) /* Don't allow evil boot loaders, kernels, or * userspace applications to deceive us: */ - smm_lock(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + smm_lock(); #if TEST_SMM_FLASH_LOCKDOWN /* Now try this: */ |