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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-21 08:24:02 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-26 11:48:10 +0000 |
| commit | 026863b2ffa132e1f206a86b3fbf9360c86138d3 (patch) | |
| tree | df7193892922fe7c7c21d4a56da0554eac629d0d /src/southbridge | |
| parent | 47a6603f34481e1226c106002c9fd7fb3d0c2c04 (diff) | |
| download | coreboot-026863b2ffa132e1f206a86b3fbf9360c86138d3.tar.xz | |
southbridge/intel/common/spi.c: Define __SIMPLE_DEVICE__
This simplifies PCI config space accessors.
Change-Id: Idf0f90ee2dc1dcb0003ef5d56eff44ca9a5634e7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 4926df9d50..3b7842de7d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -15,6 +15,8 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + /* This file is derived from the flashrom project. */ #include <arch/early_variables.h> #include <stdint.h> @@ -274,11 +276,7 @@ static void ich_set_bbar(uint32_t minaddr) #define RCBA 0xf0 #define SBASE 0x54 -#ifdef __SIMPLE_DEVICE__ static void *get_spi_bar(pci_devfn_t dev) -#else -static void *get_spi_bar(struct device *dev) -#endif { uintptr_t rcba; /* Root Complex Register Block */ uintptr_t sbase; @@ -306,11 +304,7 @@ void spi_init(void) struct ich7_spi_regs *ich7_spi; uint16_t hsfs; -#ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, 31, 0); -#else - struct device *dev = pcidev_on_root(31, 0); -#endif if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) { ich7_spi = get_spi_bar(dev); |