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authorStefan Reinauer <stepan@coresystems.de>2010-04-09 13:35:03 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-09 13:35:03 +0000
commit306343266b47db9022591a342571631fb864ae18 (patch)
treec8e6c2ae96767a3f95922a51b51d43ddbd69e52a /src/southbridge
parentd41a0bc532c837705d5abc2334e1bbf9dd06eb83 (diff)
downloadcoreboot-306343266b47db9022591a342571631fb864ae18.tar.xz
zero warnings days.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_early_ctrl.c2
-rw-r--r--src/southbridge/amd/sb700/sb700_reset.c33
2 files changed, 4 insertions, 31 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_early_ctrl.c b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c
index 5490777d42..0365662d58 100644
--- a/src/southbridge/amd/amd8111/amd8111_early_ctrl.c
+++ b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c
@@ -1,3 +1,5 @@
+#include <reset.h>
+
/* by yhlu 2005.10 */
static unsigned get_sbdn(unsigned bus)
{
diff --git a/src/southbridge/amd/sb700/sb700_reset.c b/src/southbridge/amd/sb700/sb700_reset.c
index 44af1d8bd4..32ee66b4b5 100644
--- a/src/southbridge/amd/sb700/sb700_reset.c
+++ b/src/southbridge/amd/sb700/sb700_reset.c
@@ -17,38 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <reset.h>
#include <arch/io.h>
-
-#define PCI_DEV(BUS, DEV, FN) ( \
- (((BUS) & 0xFFF) << 20) | \
- (((DEV) & 0x1F) << 15) | \
- (((FN) & 0x7) << 12))
-
-typedef u32 device_t;
-
-static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outb(value, 0xCFC + (addr & 3));
-}
-
-static void pci_write_config32(device_t dev, unsigned where, unsigned value)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outl(value, 0xCFC);
-}
-
-static unsigned pci_read_config32(device_t dev, unsigned where)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inl(0xCFC);
-}
+#include <arch/romcc_io.h>
#include "../../../northbridge/amd/amdk8/reset_test.c"