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authorFurquan Shaikh <furquan@google.com>2020-04-24 21:59:21 -0700
committerFurquan Shaikh <furquan@google.com>2020-04-28 19:50:26 +0000
commit7536a398e978aa8ddb0e5f2ae12bae73a708b68f (patch)
treeea6a86f305a7be6524b3470946f0f0726b055ade /src/southbridge
parentec3dafd97ccdc4cd4b08476724f3f53a47fbdb7a (diff)
downloadcoreboot-7536a398e978aa8ddb0e5f2ae12bae73a708b68f.tar.xz
device: Constify struct device * parameter to acpi_fill_ssdt()
.acpi_fill_ssdt() does not need to modify the device structure. This change makes the struct device * parameter to acpi_fill_ssdt() as const. Change-Id: I110f4c67c3b6671c9ac0a82e02609902a8ee5d5c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40710 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c2
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c2
-rw-r--r--src/southbridge/intel/common/acpi_pirq_gen.c2
-rw-r--r--src/southbridge/intel/common/acpi_pirq_gen.h2
-rw-r--r--src/southbridge/intel/i82371eb/acpi_tables.c2
-rw-r--r--src/southbridge/intel/i82371eb/isa.c2
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c2
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c2
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c2
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c2
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c2
12 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 278e90ac00..215965e6f2 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -823,7 +823,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *device)
+static void southbridge_fill_ssdt(const struct device *device)
{
struct device *dev = pcidev_on_root(0x1f, 0);
config_t *chip = dev->chip_info;
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 75a1b1a363..e65fd6ecae 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -274,7 +274,7 @@ static const char *sata_acpi_name(const struct device *dev)
return "SATA";
}
-static void sata_fill_ssdt(struct device *dev)
+static void sata_fill_ssdt(const struct device *dev)
{
config_t *config = dev->chip_info;
generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map);
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index d1e0c8bb70..20dafdfd38 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -71,7 +71,7 @@ static void gen_pirq_route(const enum emit_type emit, const char *lpcb_path,
}
}
-void intel_acpi_gen_def_acpi_pirq(struct device *dev)
+void intel_acpi_gen_def_acpi_pirq(const struct device *dev)
{
const char *lpcb_path = acpi_device_path(dev);
char pci_int_mapping[32][4];
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.h b/src/southbridge/intel/common/acpi_pirq_gen.h
index dc2cae9847..acb1bcb1ac 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.h
+++ b/src/southbridge/intel/common/acpi_pirq_gen.h
@@ -24,7 +24,7 @@ enum pirq {
PIRQ_H,
};
-void intel_acpi_gen_def_acpi_pirq(struct device *dev);
+void intel_acpi_gen_def_acpi_pirq(const struct device *dev);
enum pirq intel_common_map_pirq(const struct device *dev,
const enum pci_pin pci_pin);
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 9da9c23e53..96fcefcebb 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -25,7 +25,7 @@ static int determine_total_number_of_cores(void)
return count;
}
-void generate_cpu_entries(struct device *device)
+void generate_cpu_entries(const struct device *device)
{
int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6;
int numcpus = determine_total_number_of_cores();
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index bb876115a3..bc492df15a 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -118,7 +118,7 @@ static void sb_read_resources(struct device *dev)
}
#if CONFIG(HAVE_ACPI_TABLES)
-static void southbridge_acpi_fill_ssdt_generator(struct device *device)
+static void southbridge_acpi_fill_ssdt_generator(const struct device *device)
{
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
generate_cpu_entries(device);
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index c24460cd81..9b5f5457fc 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -647,7 +647,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *device)
+static void southbridge_fill_ssdt(const struct device *device)
{
intel_acpi_gen_def_acpi_pirq(device);
}
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 923056c7a8..a177c6cc64 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -494,7 +494,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *device)
+static void southbridge_fill_ssdt(const struct device *device)
{
struct device *dev = pcidev_on_root(0x1f, 0);
config_t *chip = dev->chip_info;
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 91f92859c1..380dca4c30 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -652,7 +652,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *device)
+static void southbridge_fill_ssdt(const struct device *device)
{
struct device *dev = pcidev_on_root(0x1f, 0);
config_t *chip = dev->chip_info;
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 395919e676..242d274932 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -716,7 +716,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *device)
+static void southbridge_fill_ssdt(const struct device *device)
{
struct device *dev = pcidev_on_root(0x1f, 0);
config_t *chip = dev->chip_info;
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 3a7bdb605f..11ac078c83 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -212,7 +212,7 @@ static void sata_enable(struct device *dev)
pci_write_config16(dev, 0x90, map);
}
-static void sata_fill_ssdt(struct device *dev)
+static void sata_fill_ssdt(const struct device *dev)
{
config_t *config = dev->chip_info;
generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map);
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 42469ba3c1..d44009b00f 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -877,7 +877,7 @@ static const char *lpc_acpi_name(const struct device *dev)
return "LPCB";
}
-static void southbridge_fill_ssdt(struct device *dev)
+static void southbridge_fill_ssdt(const struct device *dev)
{
intel_acpi_gen_def_acpi_pirq(dev);
}