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| author | Myles Watson <mylesgw@gmail.com> | 2010-07-06 20:36:36 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-07-06 20:36:36 +0000 |
| commit | 8376831eafc1be1175529fd21e0d2fe40339d4eb (patch) | |
| tree | 6d1339712204c3376364fd69ed80116675dd53d6 /src/southbridge | |
| parent | 106f7ffadf0a5a95b7f465607e9b9cac0a24647e (diff) | |
| download | coreboot-8376831eafc1be1175529fd21e0d2fe40339d4eb.tar.xz | |
A bug fix:
Fix the ctrl_devport_conf_clear to clear the enable bit.
A simplification:
Dynamically enable ck804s that are found instead of relying on #defines.
Removing an Opteron changes the number of ck804s that are present.
Simple changes to make it easier to compare the factory BIOS with Coreboot when
using SerialICE for boards with the Nvidia ck804 chipset:
If the mask is zero, don't read the value, just write the new value over it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/nvidia/ck804/ck804_early_setup_car.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c index c7263f5b79..6b2e3f5a61 100644 --- a/src/southbridge/nvidia/ck804/ck804_early_setup_car.c +++ b/src/southbridge/nvidia/ck804/ck804_early_setup_car.c @@ -102,8 +102,8 @@ static void ck804_early_clear_port(unsigned ck804_num, unsigned *busn, unsigned *io_base) { static const unsigned int ctrl_devport_conf_clear[] = { - PCI_ADDR(0, 0x1, 0, ANACTRL_REG_POS), ~(0x0000ff00), 0, - PCI_ADDR(0, 0x1, 0, SYSCTRL_REG_POS), ~(0x0000ff00), 0, + PCI_ADDR(0, 0x1, 0, ANACTRL_REG_POS), ~(0x0000ff01), 0, + PCI_ADDR(0, 0x1, 0, SYSCTRL_REG_POS), ~(0x0000ff01), 0, }; int j; @@ -211,9 +211,10 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)), #endif -#if CK804_NUM > 1 + }; + + static const unsigned int ctrl_conf_multiple[] = { RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0, ~(3 << 2), (0 << 2), -#endif }; static const unsigned int ctrl_conf_slave[] = { @@ -284,7 +285,12 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, if (busn[j] == 0) { setup_resource_map_x_offset(ctrl_conf_master, ARRAY_SIZE(ctrl_conf_master), - PCI_DEV(busn[0], CK804_DEVN_BASE, 0), io_base[0]); + PCI_DEV(0, CK804_DEVN_BASE, 0), io_base[0]); + if (ck804_num > 1) + setup_resource_map_x_offset(ctrl_conf_multiple, + ARRAY_SIZE(ctrl_conf_multiple), + PCI_DEV(0, CK804_DEVN_BASE, 0), 0); + continue; } |