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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-21 00:26:53 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 11:45:28 +0000 |
| commit | 933f90147b63be04e985db7784d80f32faec08c9 (patch) | |
| tree | 3b5b4107bbb1c6c346bf7a62b966c1daf5381d7e /src/southbridge | |
| parent | d15183144a5eee46740b7b71eb29ef8011cba9be (diff) | |
| download | coreboot-933f90147b63be04e985db7784d80f32faec08c9.tar.xz | |
sb/intel/lynxpoint: Drop stale code paths
These appear to be leftovers from old SMM relocation code.
Change-Id: I689bee55943b29990f54cb798b999940eae180bc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 102ed24426..48b76e282a 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -58,38 +58,6 @@ void global_smi_enable(void) smm_southbridge_enable(PWRBTN_EN | GBL_EN); } -static void __unused southbridge_trigger_smi(void) -{ - /** - * There are several methods of raising a controlled SMI# via - * software, among them: - * - Writes to io 0xb2 (APMC) - * - Writes to the Local Apic ICR with Delivery mode SMI. - * - * Using the local APIC is a bit more tricky. According to - * AMD Family 11 Processor BKDG no destination shorthand must be - * used. - * The whole SMM initialization is quite a bit hardware specific, so - * I'm not too worried about the better of the methods at the moment - */ - - /* raise an SMI interrupt */ - printk(BIOS_SPEW, " ... raise SMI#\n"); - apm_control(APM_CNT_NOOP_SMI); -} - -static void __unused southbridge_clear_smi_status(void) -{ - /* Clear SMI status */ - clear_smi_status(); - - /* Clear PM1 status */ - clear_pm1_status(); - - /* Set EOS bit so other SMIs can occur. */ - enable_smi(EOS); -} - void smm_setup_structures(void *gnvs, void *tcg, void *smi1) { /* |