sb/amd/cs5536: Remove includes of C files

The romstage for CS5536 platforms were including early_smbus.c and
early_setup.c.  Build these into romstage from the makefile, and remove
the #includes.

Add a Kconfig option for platforms that do not use the
early smbus code.

Change-Id: I2e6a9cd859292b4dd4720b547d1ff0bbb6c319cf
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

5 files changed, 29 insertions, 3 deletions

diff --git a/src/southbridge/amd/cs5536/Kconfig b/src/southbridge/amd/cs5536/Kconfig
index 93e978788b..6b06c33642 100644
--- a/src/southbridge/amd/cs5536/Kconfig
+++ b/src/southbridge/amd/cs5536/Kconfig
@@ -16,3 +16,12 @@
 config SOUTHBRIDGE_AMD_CS5536
 	bool
 	select UDELAY_TSC
+
+if SOUTHBRIDGE_AMD_CS5536
+
+config NO_EARLY_SMBUS
+	def_bool n
+	help
+	  Skip the CS5536 early SMBUS initialization.
+
+endif
diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc
index a274fe5987..4bd88ac587 100644
--- a/src/southbridge/amd/cs5536/Makefile.inc
+++ b/src/southbridge/amd/cs5536/Makefile.inc
@@ -15,6 +15,9 @@
 
 ifeq ($(CONFIG_SOUTHBRIDGE_AMD_CS5536),y)
 
+romstage-y += early_smbus.c
+romstage-y += early_setup.c
+
 ramstage-y += cs5536.c
 ramstage-y += ide.c
 ramstage-y += pirq.c
diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h
index 7de9147e09..72dbd5c216 100644
--- a/src/southbridge/amd/cs5536/cs5536.h
+++ b/src/southbridge/amd/cs5536/cs5536.h
@@ -442,6 +442,10 @@
 #if defined(__PRE_RAM__)
 void cs5536_setup_onchipuart(int uart);
 void cs5536_disable_internal_uart(void);
+void cs5536_early_setup(void);
+
+void cs5536_enable_smbus(void);
+int smbus_read_byte(unsigned device, unsigned address);
 #else
 void chipsetinit(void);
 #endif
diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c
index 6c692225e4..0ccca36083 100644
--- a/src/southbridge/amd/cs5536/early_setup.c
+++ b/src/southbridge/amd/cs5536/early_setup.c
@@ -19,6 +19,12 @@
  *	AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide.
  */
 
+#include <arch/io.h>
+#include <cpu/x86/bist.h>
+#include <cpu/x86/msr.h>
+#include <cpu/amd/lxdef.h>
+#include "cs5536.h"
+
 /**
  * @brief Setup PCI IDSEL for CS5536
  */
@@ -244,7 +250,7 @@ void cs5536_setup_onchipuart(int uart)
  * and we don't want to hang on serial, so they are
  * commented out
  */
-static void cs5536_early_setup(void)
+void cs5536_early_setup(void)
 {
 	msr_t msr;
 
diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c
index e11b91f236..ed2b9429b4 100644
--- a/src/southbridge/amd/cs5536/early_smbus.c
+++ b/src/southbridge/amd/cs5536/early_smbus.c
@@ -13,13 +13,17 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include "cs5536.h"
 #include "smbus.h"
 
 /* initialization for SMBus Controller */
-static void cs5536_enable_smbus(void)
+void cs5536_enable_smbus(void)
 {
 
+	if (IS_ENABLED(CONFIG_NO_EARLY_SMBUS))
+		return;
+
 	/* Set SCL freq and enable SMB controller */
 	/*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */
 	outb((0x7F << 1) | SMB_CTRL2_ENABLE, SMBUS_IO_BASE + SMB_CTRL2);
@@ -29,7 +33,7 @@ static void cs5536_enable_smbus(void)
 
 }
 
-static inline int smbus_read_byte(unsigned device, unsigned address)
+int smbus_read_byte(unsigned device, unsigned address)
 {
 	return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
 }