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authorMarc Jones <marcj.jones@amd.com>2008-10-09 16:05:16 +0000
committerMarc Jones <marc.jones@amd.com>2008-10-09 16:05:16 +0000
commitc1d06b782ff140acae61253a3e663c0ac517ab04 (patch)
treef7f3bae5d5736cc71559c6225555845e5da24f10 /src/southbridge
parent4b1971cc6274899cf487e255048395342138f601 (diff)
downloadcoreboot-c1d06b782ff140acae61253a3e663c0ac517ab04.tar.xz
Added comment about sb600 wideio setting for clarity and a minor witespace cleanup. (trivial)
Signed-off-by: Marc Jones <marcj.jones@amd.com> Acked-by: Marc Jones <marcj.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/sb600/sb600_lpc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/amd/sb600/sb600_lpc.c b/src/southbridge/amd/sb600/sb600_lpc.c
index c342e31f42..83dea99883 100644
--- a/src/southbridge/amd/sb600/sb600_lpc.c
+++ b/src/southbridge/amd/sb600/sb600_lpc.c
@@ -165,7 +165,7 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
case 0xfd60:
reg_x |= (1 << 23);
break;
- default:
+ default:
if (var_num >= 3)
continue; /* only 3 var ; compact them ? */
switch (var_num) {
@@ -188,6 +188,7 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
}
pci_write_config32(dev, 0x44, reg);
pci_write_config32(dev, 0x48, reg_x);
+ /* Set WideIO for as many IOs found (fall through is on purpose) */
switch (var_num) {
case 2:
pci_write_config16(dev, 0x90, reg_var[2]);