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authorGabe Black <gabeblack@google.com>2014-03-27 21:26:46 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-12-09 20:32:18 +0100
commitec9293fb5af2c0f798a8ee6e5fead819487f1587 (patch)
treeda81aa1adae4efa68f62a2a7796c5473f671c7d0 /src/southbridge
parent87f3b4ea01ca90eb242dbf1a8b829d1fb3aaaa7d (diff)
downloadcoreboot-ec9293fb5af2c0f798a8ee6e5fead819487f1587.tar.xz
spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.
They were only used internal to the SPI drivers and, according to the comment next to their prototypes, were for when the SPI controller doesn't control the chip select line directly and needs some help. BUG=None TEST=Built for link, falco, and rambi. Built and booted on peach_pit and nyan. BRANCH=None Original-Change-Id: If4622819a4437490797d305786e2436e2e70c42b Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/192048 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 1e2deecd9d8c6fd690c54f24e902cc7d2bab0521) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ida08cbc2be5ad09b929ca16e483c36c49ac12627 Reviewed-on: http://review.coreboot.org/7708 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c8
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c8
-rw-r--r--src/southbridge/intel/common/spi.c10
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c10
4 files changed, 0 insertions, 36 deletions
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index bbf6dd3ee2..735ab7ed16 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -182,14 +182,6 @@ void spi_release_bus(struct spi_slave *slave)
#endif
}
-void spi_cs_activate(struct spi_slave *slave)
-{
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-}
-
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index f38e691254..c84eee20c2 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -174,14 +174,6 @@ void spi_release_bus(struct spi_slave *slave)
#endif
}
-void spi_cs_activate(struct spi_slave *slave)
-{
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-}
-
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index c35e8b7413..48c72b7737 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -371,16 +371,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
-void spi_cs_activate(struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 33f645945f..ee22019ade 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -447,16 +447,6 @@ void spi_release_bus(struct spi_slave *slave)
/* Handled by ICH automatically. */
}
-void spi_cs_activate(struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- /* Handled by ICH automatically. */
-}
-
typedef struct spi_transaction {
const uint8_t *out;
uint32_t bytesout;