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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-07-10 13:26:59 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-25 00:35:10 +0200 |
| commit | 0c32c9795b1cb2270f677e55ba38e7d293e723ee (patch) | |
| tree | 9beb3c53ced0ac3aa174cbc4d8332f49eafe3e6f /src/southbridge | |
| parent | 9c4c6ab0c895a35d6bad33ecb2cb7f40eea98001 (diff) | |
| download | coreboot-0c32c9795b1cb2270f677e55ba38e7d293e723ee.tar.xz | |
bd82x6x: Drop unneeded pci_dev_t
This was introduced when porting the SPI driver over from u-boot but it
is not needed. Hence drop the extra typedef and use device_t instead.
Change-Id: I3ab797a8e482d1c9aa1d004e488e99aeaffcdd8b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1331
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/spi.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c index 6b395712da..5903fd8cf4 100644 --- a/src/southbridge/intel/bd82x6x/spi.c +++ b/src/southbridge/intel/bd82x6x/spi.c @@ -36,7 +36,6 @@ #ifdef __SMM__ #include <arch/romcc_io.h> #include <northbridge/intel/sandybridge/pcie_config.c> -typedef device_t pci_dev_t; #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pcie_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ @@ -52,7 +51,6 @@ typedef device_t pci_dev_t; #else /* !__SMM__ */ #include <device/device.h> #include <device/pci.h> -typedef device_t pci_dev_t; #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pci_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ @@ -331,7 +329,7 @@ void spi_init(void) uint8_t *rcrb; /* Root Complex Register Block */ uint32_t rcba; /* Root Complex Base Address */ uint8_t bios_cntl; - pci_dev_t dev; + device_t dev; uint32_t ids; uint16_t vendor_id, device_id; |