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| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-25 00:52:23 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-09-27 22:46:41 +0000 |
| commit | 1d70a331cbc2c07d83b7fd2206f5c6a4d5975bae (patch) | |
| tree | 4b0678e27a571583624d57c38db0048f9d91f5c7 /src/southbridge | |
| parent | a5768f535bbc7083b59ae1f7f73c37cd29c031bc (diff) | |
| download | coreboot-1d70a331cbc2c07d83b7fd2206f5c6a4d5975bae.tar.xz | |
sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines
Change-Id: I8a3a6ac69c6ce6e074f5004df24e67d2b16905fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45718
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/pch.asl | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl index 154633d14f..6d0428c464 100644 --- a/src/southbridge/intel/lynxpoint/acpi/pch.asl +++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl @@ -23,9 +23,6 @@ Scope(\) OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) Field(RCRB, DWordAcc, Lock, Preserve) { - Offset(0x0000), // Backbone - Offset(0x1000), // Chipset - Offset(0x3000), // Legacy Configuration Registers Offset(0x3404), // High Performance Timer Configuration HPAS, 2, // Address Select , 5, |