diff options
author | Alexey Buyanov <alexey.buyanov@intel.com> | 2020-06-01 22:08:35 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-14 16:55:02 +0000 |
commit | 2232e8906564153c142d27b986f0a23175b7b7d6 (patch) | |
tree | 807004b8a088f9d5720681b1edda9520cde0fafa /src/southbridge | |
parent | 5591b91b1a3cc3c16621027527182940ed540599 (diff) | |
download | coreboot-2232e8906564153c142d27b986f0a23175b7b7d6.tar.xz |
southbridge/intel/common: Introduce ASL2.0 syntax
Modify southbridge/intel/common .asl files to comply with ASL2.0 syntax for
better code readability and clarity
BUG=none
BRANCH=none
TEST= Google Parrot platform coreboot binary remains the same after the changes are applied
Signed-off-by: Alexey Buyanov <alexey.buyanov@intel.com>
Change-Id: Ia11769d5ac6154ed79d967d7bab36e12a1db751a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42084
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/common/acpi/platform.asl | 16 | ||||
-rw-r--r-- | src/southbridge/intel/common/acpi/smbus.asl | 78 |
2 files changed, 47 insertions, 47 deletions
diff --git a/src/southbridge/intel/common/acpi/platform.asl b/src/southbridge/intel/common/acpi/platform.asl index 2786d93ec5..b1dda02716 100644 --- a/src/southbridge/intel/common/acpi/platform.asl +++ b/src/southbridge/intel/common/acpi/platform.asl @@ -20,8 +20,8 @@ Field (POST, ByteAcc, Lock, Preserve) /* SMI I/O Trap */ Method(TRAP, 1, Serialized) { - Store (Arg0, SMIF) // SMI Function - Store (0, TRP0) // Generate trap + SMIF = Arg0 // SMI Function + TRP0 = 0 // Generate trap Return (SMIF) // Return value of SMI handler } @@ -35,7 +35,7 @@ Method(TRAP, 1, Serialized) Method(_PIC, 1) { // Remember the OS' IRQ routing choice. - Store(Arg0, PICM) + PICM = Arg0 } Method(GOS, 0) @@ -54,23 +54,23 @@ Method(GOS, 0) */ /* Let's assume we're running at least Windows 2000 */ - Store (2000, OSYS) + OSYS = 2000 If (CondRefOf(_OSI)) { If (_OSI("Windows 2001")) { - Store (2001, OSYS) + OSYS = 2001 } If (_OSI("Windows 2001 SP1")) { - Store (2001, OSYS) + OSYS = 2001 } If (_OSI("Windows 2001 SP2")) { - Store (2002, OSYS) + OSYS = 2002 } If (_OSI("Windows 2006")) { - Store (2006, OSYS) + OSYS = 2006 } } } diff --git a/src/southbridge/intel/common/acpi/smbus.asl b/src/southbridge/intel/common/acpi/smbus.asl index 83c8991fbf..cc9c4e2b0a 100644 --- a/src/southbridge/intel/common/acpi/smbus.asl +++ b/src/southbridge/intel/common/acpi/smbus.asl @@ -43,22 +43,22 @@ Device (SBUS) // Kill all SMBus communication Method (KILL, 0, Serialized) { - Or (HCNT, 0x02, HCNT) // Send Kill - Or (HSTS, 0xff, HSTS) // Clean Status + HCNT |= 0x02 // Send Kill + HSTS |= 0xff // Clean Status } // Check if last operation completed // return Failure = 0, Success = 1 Method (CMPL, 0, Serialized) { - Store (4000, Local0) // Timeout 200ms in 50us steps + Local0 = 4000 // Timeout 200ms in 50us steps While (Local0) { - If (And(HSTS, 0x02)) { // Completion Status? + If (HSTS & 0x02) { // Completion Status? Return (1) // Operation Completed } Else { Stall (50) - Decrement (Local0) - If (LEqual(Local0, 0)) { + Local0-- + If (Local0 == 0) { KILL() } } @@ -71,25 +71,25 @@ Device (SBUS) // Wait for SMBus to become ready Method (SRDY, 0, Serialized) { - Store (200, Local0) // Timeout 200ms + Local0 = 200 // Timeout 200ms While (Local0) { - If (And(HSTS, 0x40)) { // IN_USE? + If (HSTS & 0x40) { // IN_USE? Sleep(1) // Wait 1ms - Decrement(Local0) // timeout-- - If (LEqual(Local0, 0)) { + Local0-- // timeout-- + If (Local0 == 0) { Return (1) } } Else { - Store (0, Local0) // We're ready + Local0 = 0 // We're ready } } - Store (4000, Local0) // Timeout 200ms (50us * 4000) + Local0 = 4000 // Timeout 200ms (50us * 4000) While (Local0) { - If (And (HSTS, 0x01)) { // Host Busy? + If (HSTS & 0x01) { // Host Busy? Stall(50) // Wait 50us - Decrement(Local0) // timeout-- - If (LEqual(Local0, 0)) { + Local0-- // timeout-- + If (Local0 == 0) { KILL() } } Else { @@ -114,15 +114,15 @@ Device (SBUS) } // Send Byte - Store (0, I2CE) // SMBus Enable - Store (0xbf, HSTS) - Store (Arg0, TXSA) // Write Address - Store (Arg1, HCMD) // Write Data + I2CE = 0 // SMBus Enable + HSTS = 0xbf + TXSA = Arg0 // Write Address + HCMD = Arg1 // Write Data - Store (0x48, HCNT) // Start + Byte Data Protocol + HCNT = 0x48 // Start + Byte Data Protocol If (CMPL()) { - Or (HSTS, 0xff, HSTS) // Clean up + HSTS |= 0xff // Clean up Return (1) // Success } @@ -143,14 +143,14 @@ Device (SBUS) } // Receive Byte - Store (0, I2CE) // SMBus Enable - Store (0xbf, HSTS) - Store (Or (Arg0, 1), TXSA) // Write Address + I2CE = 0 // SMBus Enable + HSTS = 0xbf + TXSA = Arg0 | 1 // Write Address - Store (0x44, HCNT) // Start + HCNT = 0x44 // Start If (CMPL()) { - Or (HSTS, 0xff, HSTS) // Clean up + HSTS |= 0xff // Clean up Return (DAT0) // Success } @@ -173,16 +173,16 @@ Device (SBUS) } // Send Byte - Store (0, I2CE) // SMBus Enable - Store (0xbf, HSTS) - Store (Arg0, TXSA) // Write Address - Store (Arg1, HCMD) // Write Command - Store (Arg2, DAT0) // Write Data + I2CE = 0 // SMBus Enable + HSTS = 0xbf + TXSA = Arg0 // Write Address + HCMD = Arg1 // Write Command + DAT0 = Arg2 // Write Data - Store (0x48, HCNT) // Start + Byte Protocol + HCNT = 0x48 // Start + Byte Protocol If (CMPL()) { - Or (HSTS, 0xff, HSTS) // Clean up + HSTS |= 0xff // Clean up Return (1) // Success } @@ -204,15 +204,15 @@ Device (SBUS) } // Receive Byte - Store (0, I2CE) // SMBus Enable - Store (0xbf, HSTS) - Store (Or (Arg0, 1), TXSA) // Write Address - Store (Arg1, HCMD) // Command + I2CE = 0 // SMBus Enable + HSTS = 0xbf + TXSA = Arg0 | 1 // Write Address + HCMD = Arg1 // Command - Store (0x48, HCNT) // Start + HCNT = 0x48 // Start If (CMPL()) { - Or (HSTS, 0xff, HSTS) // Clean up + HSTS |= 0xff // Clean up Return (DAT0) // Success } |