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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-16 23:29:23 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 09:00:57 +0000 |
| commit | 6beaef983aee5d886f6f8571855a92d608d98a17 (patch) | |
| tree | 9c7f858bc7baa36d9e18ed84ea61d742559922c2 /src/southbridge | |
| parent | 4821a0e135ff2d60f552203d2724ae2d44850623 (diff) | |
| download | coreboot-6beaef983aee5d886f6f8571855a92d608d98a17.tar.xz | |
sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree
Set up generic decode ranges based on the devicetree settings.
Change-Id: Ie59b8272c69231d6dffccee30b4d3c84a7e83e8f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index e74c3043f0..4f9cd325c6 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -27,6 +27,7 @@ #include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" +#include "chip.h" #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0) @@ -258,10 +259,31 @@ static void pch_generic_setup(void) write_pmbase16(TCO1_CNT, 1 << 11); /* halt timer */ } +static void pch_enable_lpc_gen_decode(void) +{ + const struct device *dev = pcidev_on_root(0x1f, 0); + const struct southbridge_intel_bd82x6x_config *config = NULL; + + /* Set up generic decode ranges */ + if (!dev) + return; + if (dev->chip_info) + config = dev->chip_info; + if (!config) + return; + + pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, config->gen1_dec); + pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, config->gen2_dec); + pci_write_config32(PCH_LPC_DEV, LPC_GEN3_DEC, config->gen3_dec); + pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, config->gen4_dec); +} + void early_pch_init(void) { pch_enable_lpc(); + pch_enable_lpc_gen_decode(); + pch_enable_bars(); pch_generic_setup(); |