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| author | Aaron Durbin <adurbin@chromium.org> | 2013-05-01 13:41:44 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:09:57 +0100 |
| commit | 764d009a615a3c1bdc42aef5506fc9b199bf5047 (patch) | |
| tree | 7a30e348cb0d90c7f159c2f8204d3f679e11b85e /src/southbridge | |
| parent | 8f4baece7acc3e0ee2e3f04a181ce51b59ec4667 (diff) | |
| download | coreboot-764d009a615a3c1bdc42aef5506fc9b199bf5047.tar.xz | |
lynxpoint: export mem console pointer in ACPI
Instead of having an OS re-parse cbmem book-keeping records
for the cbmem allocator just to get the console buffer export
the pointer to the memory console directly in a field named 'CBMC'.
This field lives in the GNVS table.
Change-Id: Ief0c4da7b18df66feb9c816c9f4abdf5a72bd3a4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49764
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4149
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/globalnvs.asl | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/nvs.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 8f6c8257c1..ef05dca3c2 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -131,6 +131,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve) S6B1, 32, // 0x98 - D21:F6 Serial IO UAR1 BAR1 S7B1, 32, // 0x9c - D23:F0 Serial IO SDIO BAR1 + Offset (0xa0), + CBMC, 32, // 0xa0 - coreboot mem console pointer + /* IGD OpRegion */ Offset (0xb4), ASLB, 32, // 0xb4 - IGD OpRegion Base Address diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h index 3df1da1f20..4283ca13d5 100644 --- a/src/southbridge/intel/lynxpoint/nvs.h +++ b/src/southbridge/intel/lynxpoint/nvs.h @@ -90,7 +90,8 @@ typedef struct { /* LynxPoint Serial IO device BARs */ u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ - u8 rsvd6[20]; + u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ + u8 rsvd6[16]; /* IGD OpRegion (not implemented yet) */ u32 aslb; /* 0xb4 - IGD OpRegion Base Address */ u8 ibtt; /* 0xb8 - IGD boot type */ |