bootstate: use structure pointers for scheduling callbacks

The GCC 4.9.2 update showed that the boot_state_init_entry
structures were being padded and assumed to be aligned in to an
increased size. The bootstate scheduler for static entries,
boot_state_schedule_static_entries(), was then calculating the
wrong values within the array. To fix this just use a pointer to
the boot_state_init_entry structure that needs to be scheduled.

In addition to the previous issue noted above, the .bs_init
section was sitting in the read only portion of the image while
the fields within it need to be writable. Also, the
boot_state_schedule_static_entries() was using symbol comparison
to terminate a loop which in C can lead the compiler to always
evaluate the loop at least once since the language spec indicates
no 2 symbols can be the same value.

Change-Id: I6dc5331c2979d508dde3cd5c3332903d40d8048b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8699
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

5 files changed, 5 insertions, 19 deletions

diff --git a/src/southbridge/amd/agesa/hudson/pci.c b/src/southbridge/amd/agesa/hudson/pci.c
index 49e2ba6c47..5858cd2ef7 100644
--- a/src/southbridge/amd/agesa/hudson/pci.c
+++ b/src/southbridge/amd/agesa/hudson/pci.c
@@ -45,10 +45,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 static struct pci_operations lops_pci = {
 	.set_subsystem = 0,
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 2125027083..f4a7aa341a 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -326,10 +326,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 /**
  * @brief SB Cimx entry point sbBeforePciInit wrapper
diff --git a/src/southbridge/amd/pi/hudson/pci.c b/src/southbridge/amd/pi/hudson/pci.c
index e8836e4c7d..70e2c18854 100644
--- a/src/southbridge/amd/pi/hudson/pci.c
+++ b/src/southbridge/amd/pi/hudson/pci.c
@@ -48,10 +48,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 static struct pci_operations lops_pci = {
 	.set_subsystem = 0,
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 1780fc09ce..416a30fba8 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -366,9 +366,7 @@ static void spi_init_cb(void *unused)
 	spi_init();
 }
 
-BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
 #endif
 
 int spi_claim_bus(struct spi_slave *slave)
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c
index 94abf5f700..18a55f6358 100644
--- a/src/southbridge/intel/lynxpoint/smi.c
+++ b/src/southbridge/intel/lynxpoint/smi.c
@@ -135,9 +135,6 @@ static void finalize_boot(void *unused)
 	outb(0xcb, 0xb2);
 }
 
-BOOT_STATE_INIT_ENTRIES(finalize) = {
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY,
-			      finalize_boot, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);
 
 #endif