diff options
author | Tristan Corrick <tristan@corrick.kiwi> | 2018-10-31 02:28:32 +1300 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-11-01 22:26:04 +0000 |
commit | 167a512d84c587c702cc0ed8918c00a2e225bac0 (patch) | |
tree | 7bc4913e236f86d59fceaec3cfce39adf60a777b /src/southbridge | |
parent | 98fb1bfa9095d79f2c0b42cb9c731003b6e6e1bf (diff) | |
download | coreboot-167a512d84c587c702cc0ed8918c00a2e225bac0.tar.xz |
sb/intel/common: Create a common implementation of `acpi_fill_madt()`
The function `acpi_fill_madt()` is identical among all the Lynx Point
boards and sb/intel/bd82x6x, so share a common function between them.
Earlier Intel platforms have similar implementations of this function.
The common implementation might only need minor alterations to support
them.
Tested on an ASRock H81M-HDS and Google Peppy (variant of Slippy). No
issues arose from this patch.
Change-Id: Ife9e3917febf43d8a92cac66b502e2dee8527556
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/common/Kconfig | 3 | ||||
-rw-r--r-- | src/southbridge/intel/common/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/common/madt.c (renamed from src/southbridge/intel/bd82x6x/madt.c) | 5 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/Kconfig | 1 |
6 files changed, 8 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 20cdeb84e3..d906ea7f25 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -41,6 +41,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select RTC select HAVE_INTEL_CHIPSET_LOCKDOWN select SOUTHBRIDGE_INTEL_COMMON_SMM + select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT config EHCI_BAR hex diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index d8730dfdd3..c00b2c4263 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -47,6 +47,6 @@ else romstage-y += early_me_mrc.c early_usb_mrc.c endif -ramstage-y += madt.c early_pch_common.c +ramstage-y += early_pch_common.c endif diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 47a714b323..957faa5184 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -30,6 +30,9 @@ config HAVE_INTEL_CHIPSET_LOCKDOWN config SOUTHBRIDGE_INTEL_COMMON_SMM def_bool n +config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT + bool + config INTEL_DESCRIPTOR_MODE_CAPABLE def_bool n help diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 249d2496ef..4df559e38d 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -52,4 +52,6 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ) += rcba_pirq.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c +ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c + endif diff --git a/src/southbridge/intel/bd82x6x/madt.c b/src/southbridge/intel/common/madt.c index afa15ae2f6..238e3c80cb 100644 --- a/src/southbridge/intel/bd82x6x/madt.c +++ b/src/southbridge/intel/common/madt.c @@ -13,13 +13,8 @@ * GNU General Public License for more details. */ -#include <types.h> -#include <string.h> -#include <cbmem.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> -#include <arch/acpigen.h> #include <arch/smp/mpspec.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 1e088c1362..37e32db9f9 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -24,6 +24,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI + select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select IOAPIC select HAVE_USBDEBUG_OPTIONS select USE_WATCHDOG_ON_BOOT |