diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2015-09-03 15:57:56 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-09 20:19:12 +0000 |
commit | 372b67e22b61a38fea3549b6658cdfe127459aab (patch) | |
tree | d64a1f7bfbe2ebde99d631c8a02146ede8631cdb /src/southbridge | |
parent | 3bad4cb086276a0fef715a3e661b489c59e27e08 (diff) | |
download | coreboot-372b67e22b61a38fea3549b6658cdfe127459aab.tar.xz |
skylake: dptf: Add TSR3 thermal sensor and CPU code cleanup
- glados has more thermal sensors that could be used so add
another entry in the DTPF thermal sensor ACPI code.
- fix indentation block in cpu.asl.
- declare \_SB.MPDL as external (it is already CondRefOf)
so it does not need to be present in mainboard config if
the mainboard does not want to override the default.
BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot
Change-Id: I1afe7013a24ee1215f5e968e25594f746bbdd17c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8d357437d06349039a94869b088c3c50b32933c0
Original-Change-Id: Ie87d52e735bf930a003e525cf1918789920922a5
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297335
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11558
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions