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authorGreg Watson <jarrah@users.sourceforge.net>2003-07-23 21:33:03 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2003-07-23 21:33:03 +0000
commit39264e2b3b08f5873936763cc8d8ecec44f5366f (patch)
tree3610120a269d4082430affd95d70a5d04e7d7d65 /src/southbridge
parentb87b2b89b23bb69bde2bc89546c94d892e005969 (diff)
downloadcoreboot-39264e2b3b08f5873936763cc8d8ecec44f5366f.tar.xz
new static configuration
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/winbond/w83c553/Config.lb1
-rw-r--r--src/southbridge/winbond/w83c553/chip.h2
-rw-r--r--src/southbridge/winbond/w83c553/w83c553f.c25
3 files changed, 27 insertions, 1 deletions
diff --git a/src/southbridge/winbond/w83c553/Config.lb b/src/southbridge/winbond/w83c553/Config.lb
index d0788c892e..adaa1218e9 100644
--- a/src/southbridge/winbond/w83c553/Config.lb
+++ b/src/southbridge/winbond/w83c553/Config.lb
@@ -1 +1,2 @@
+config chip.h
object w83c553f.o
diff --git a/src/southbridge/winbond/w83c553/chip.h b/src/southbridge/winbond/w83c553/chip.h
new file mode 100644
index 0000000000..8e387fba28
--- /dev/null
+++ b/src/southbridge/winbond/w83c553/chip.h
@@ -0,0 +1,2 @@
+struct southbridge_winbond_w83c553_config {
+};
diff --git a/src/southbridge/winbond/w83c553/w83c553f.c b/src/southbridge/winbond/w83c553/w83c553f.c
index 2d9daaea93..c5855996b6 100644
--- a/src/southbridge/winbond/w83c553/w83c553f.c
+++ b/src/southbridge/winbond/w83c553/w83c553f.c
@@ -29,8 +29,10 @@
#include <arch/io.h>
#include <device/pci.h>
+#include <device/chip.h>
#include <console/console.h>
#include "w83c553f.h"
+#include "chip.h"
#ifndef CONFIG_ISA_MEM
#define CONFIG_ISA_MEM 0xFD000000
@@ -69,7 +71,7 @@ void southbridge_early_init(void)
}
#endif
-void southbridge_init(void)
+void w83c553_init(void)
{
struct device *dev;
unsigned char reg8;
@@ -283,3 +285,24 @@ void initialise_dma(void)
outb(W83C553F_DMA1 + W83C553F_DMA1_CS, 0x00);
outw(W83C553F_DMA2 + W83C553F_DMA2_CS, 0x0000);
}
+
+void southbridge_init(struct chip *chip, enum chip_pass pass)
+{
+
+ struct southbridge_winbond_w83c553_config *conf = (struct southbridge_winbond_w83c553_config *)chip->chip_info;
+
+ switch (pass) {
+ case CONF_PASS_POST_PCI:
+ w83c553_init();
+ break;
+
+ default:
+ /* nothing yet */
+ break;
+ }
+}
+
+struct chip_control southbridge_winbond_w83c553_control = {
+ enable: southbridge_init,
+ name: "Winbond W83C553"
+};