i82371eb & qemu: Move to per-device ACPI.

This one is special because qemu is really far from anything real but
shares some common features.

Change-Id: Ia1631611724a074780e1fece50166730b2ee94ae
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6939
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

6 files changed, 30 insertions, 100 deletions

diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig
index d91c8b7366..5ddbe0f240 100644
--- a/src/southbridge/intel/i82371eb/Kconfig
+++ b/src/southbridge/intel/i82371eb/Kconfig
@@ -6,3 +6,11 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT
 	default "southbridge/intel/i82371eb/bootblock.c"
 	depends on SOUTHBRIDGE_INTEL_I82371EB
 
+
+if SOUTHBRIDGE_INTEL_I82371EB
+
+config SOUTH_BRIDGE_OPTIONS # dummy
+	def_bool y
+	select PER_DEVICE_ACPI_TABLES
+
+endif
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 891ae22b01..64d2c23d0a 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -28,8 +28,6 @@
 #include <device/pci_ids.h>
 #include "i82371eb.h"
 
-extern const unsigned char AmlCode[];
-
 static int determine_total_number_of_cores(void)
 {
 	device_t cpu;
@@ -49,21 +47,18 @@ static int determine_total_number_of_cores(void)
 
 void generate_cpu_entries(void)
 {
-	int len;
-	int len_pr;
 	int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6;
 	int numcpus = determine_total_number_of_cores();
 	printk(BIOS_DEBUG, "Found %d CPU(s).\n", numcpus);
 
 	/* without the outer scope, furhter ssdt addition will end up
 	 * within the processor statement */
-	len = acpigen_write_scope("\\_PR");
+	acpigen_write_scope("\\_PR");
 	for (cpu=0; cpu < numcpus; cpu++) {
-		len_pr = acpigen_write_processor(cpu, pcontrol_blk, plen);
-		acpigen_patch_len(len_pr - 1);
-		len += len_pr;
+		acpigen_write_processor(cpu, pcontrol_blk, plen);
+		acpigen_pop_len();
 	}
-	acpigen_patch_len(len - 1);
+	acpigen_pop_len();
 }
 
 unsigned long __attribute__((weak)) acpi_fill_slit(unsigned long current)
@@ -83,90 +78,3 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 	/* chipset doesn't have mmconfig */
 	return current;
 }
-
-unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long current,
-						 const char *oem_table_id)
-{
-	acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
-	/* generate_cpu_entries() generates weird bytecode and has to come
-	 * last or else the following entries will end up inside the
-	 * processor scope */
-	generate_cpu_entries();
-	return (unsigned long) acpigen_get_current();
-}
-
-unsigned long __attribute__((weak)) write_acpi_tables(unsigned long start)
-{
-	unsigned long current;
-	acpi_rsdp_t *rsdp;
-	acpi_rsdt_t *rsdt;
-	acpi_fadt_t *fadt;
-	acpi_facs_t *facs;
-	acpi_madt_t *madt;
-	acpi_header_t *ssdt;
-	acpi_header_t *dsdt;
-
-	/* Align ACPI tables to 16 byte. */
-	start = ALIGN(start, 16);
-	current = start;
-
-	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
-
-	/* We need at least an RSDP and an RSDT table. */
-	rsdp = (acpi_rsdp_t *) current;
-	current += sizeof(acpi_rsdp_t);
-	rsdt = (acpi_rsdt_t *) current;
-	current += sizeof(acpi_rsdt_t);
-
-	/* Clear all table memory. */
-	memset((void *) start, 0, current - start);
-
-	acpi_write_rsdp(rsdp, rsdt, NULL);
-	acpi_write_rsdt(rsdt);
-
-	/* We explicitly add these tables later on: */
-	printk(BIOS_DEBUG, "ACPI:     * FACS\n");
-
-	/* we should align FACS to 64B as per ACPI specs */
-	current = ALIGN(current, 64);
-	facs = (acpi_facs_t *) current;
-	current += sizeof(acpi_facs_t);
-	acpi_create_facs(facs);
-
-	dsdt = (acpi_header_t *)current;
-	memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
-	current += dsdt->length;
-	memcpy(dsdt, &AmlCode, dsdt->length);
-	/* Don't trust iasl to get checksum right. */
-	dsdt->checksum = 0; /* needs to be set to 0 first (part of csum) */
-	dsdt->checksum = acpi_checksum((u8*)dsdt, dsdt->length);
-	printk(BIOS_DEBUG, "ACPI:     * DSDT @ %p Length %x\n", dsdt,
-		     dsdt->length);
-	printk(BIOS_DEBUG, "ACPI:     * FADT\n");
-
-	fadt = (acpi_fadt_t *) current;
-	current += sizeof(acpi_fadt_t);
-
-	acpi_create_fadt(fadt, facs, dsdt);
-	acpi_add_table(rsdp, fadt);
-
-	printk(BIOS_DEBUG, "ACPI:    * MADT\n");
-	madt = (acpi_madt_t *) current;
-	acpi_create_madt(madt);
-	if (madt->header.length > sizeof(acpi_madt_t)) {
-		current += madt->header.length;
-		acpi_add_table(rsdp, madt);
-	} else {
-		/* don't add empty madt */
-		current = (unsigned long)madt;
-	}
-
-	printk(BIOS_DEBUG, "ACPI:    * SSDT\n");
-	ssdt = (acpi_header_t *)current;
-	acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
-	current += ssdt->length;
-	acpi_add_table(rsdp, ssdt);
-
-	printk(BIOS_INFO, "ACPI: done.\n");
-	return current;
-}
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index e6062c68e8..f16d817343 100644
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -26,6 +26,7 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include "chip.h"
+
 void i82371eb_enable(device_t dev);
 void i82371eb_hard_reset(void);
 #else
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index 5261fbafa3..1deddf6f75 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -26,6 +26,10 @@
 #include <pc80/isa-dma.h>
 #include <pc80/mc146818rtc.h>
 #include <arch/ioapic.h>
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#endif
 #include "i82371eb.h"
 
 #if CONFIG_IOAPIC
@@ -124,10 +128,22 @@ static void sb_read_resources(struct device *dev)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+static void southbridge_acpi_fill_ssdt_generator(void)
+{
+	acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
+	generate_cpu_entries();
+}
+#endif
+
 static const struct device_operations isa_ops = {
 	.read_resources		= sb_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+	.write_acpi_tables      = acpi_write_hpet,
+	.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
+#endif
 	.init			= isa_init,
 	.scan_bus		= scan_static_bus,	/* TODO: Needed? */
 	.enable			= 0,
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index 1ad5aad90a..d8a32e50ca 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -27,6 +27,7 @@ config SOUTHBRIDGE_INTEL_I82801IX
 	select USE_WATCHDOG_ON_BOOT
 	select HAVE_SMI_HANDLER
 	select HAVE_USBDEBUG_OPTIONS
+	select PER_DEVICE_ACPI_TABLES
 
 if SOUTHBRIDGE_INTEL_I82801IX
 
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index e12c724c2d..6038eff114 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -539,7 +539,6 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
-#if IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES)
 static void southbridge_inject_dsdt(void)
 {
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
@@ -564,7 +563,6 @@ static void southbridge_fill_ssdt(void)
 
 	intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
 }
-#endif
 
 static struct pci_operations pci_ops = {
 	.set_subsystem = set_subsystem,
@@ -574,11 +572,9 @@ static struct device_operations device_ops = {
 	.read_resources		= i82801ix_lpc_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-#if IS_ENABLED(CONFIG_PER_DEVICE_ACPI_TABLES)
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.write_acpi_tables      = acpi_write_hpet,
 	.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
-#endif
 	.init			= lpc_init,
 	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,