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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-08-13 21:51:53 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-08-23 05:05:34 +0200
commit93b2bd70ff65a534e91c203c7948deea315675d5 (patch)
treecee63e1c0d3ca90155e15586ca9b75f5b1e37ea2 /src/southbridge
parent6bfe61d5d15d32d307047eeee8493d0e3ffa42ab (diff)
downloadcoreboot-93b2bd70ff65a534e91c203c7948deea315675d5.tar.xz
usbdebug: Do not support logging from SMM
Letting SMI handler touch EHCI controller is an excellent source of USB problems. Remove usbdebug entirely from SMM. It may be possible to make usbdebug console work from SMM after hard work and coordination with payloads and even OS drivers. But we are not there. Change-Id: Id50586758ee06e8d76e682dc6f64f756ab5b79f5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3858 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/sb600/Makefile.inc1
-rw-r--r--src/southbridge/amd/sb700/Makefile.inc1
-rw-r--r--src/southbridge/amd/sb800/Makefile.inc1
-rw-r--r--src/southbridge/intel/common/Makefile.inc1
-rw-r--r--src/southbridge/nvidia/ck804/Makefile.inc1
-rw-r--r--src/southbridge/nvidia/mcp55/Makefile.inc1
-rw-r--r--src/southbridge/sis/sis966/Makefile.inc1
7 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/amd/sb600/Makefile.inc b/src/southbridge/amd/sb600/Makefile.inc
index 57ef4de26d..d0df57c670 100644
--- a/src/southbridge/amd/sb600/Makefile.inc
+++ b/src/southbridge/amd/sb600/Makefile.inc
@@ -10,4 +10,3 @@ ramstage-y += pci.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc
index 6f699f016d..b457e4a9af 100644
--- a/src/southbridge/amd/sb700/Makefile.inc
+++ b/src/southbridge/amd/sb700/Makefile.inc
@@ -12,7 +12,6 @@ romstage-y += reset.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c
romstage-y += smbus.c
diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc
index 3e7bf11978..1253b39419 100644
--- a/src/southbridge/amd/sb800/Makefile.inc
+++ b/src/southbridge/amd/sb800/Makefile.inc
@@ -11,4 +11,3 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 06fa416242..91b6380646 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -19,4 +19,3 @@
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
-smm-$(CONFIG_USBDEBUG) += usb_debug.c
diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc
index bfafa23e41..0e57f2078e 100644
--- a/src/southbridge/nvidia/ck804/Makefile.inc
+++ b/src/southbridge/nvidia/ck804/Makefile.inc
@@ -17,7 +17,6 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc
index b20804a978..e11fc78a7f 100644
--- a/src/southbridge/nvidia/mcp55/Makefile.inc
+++ b/src/southbridge/nvidia/mcp55/Makefile.inc
@@ -17,7 +17,6 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc
chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds
diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc
index b25aa9ed87..15559739b5 100644
--- a/src/southbridge/sis/sis966/Makefile.inc
+++ b/src/southbridge/sis/sis966/Makefile.inc
@@ -12,7 +12,6 @@ ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
-smm-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc
chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds