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authorTristan Corrick <tristan@corrick.kiwi>2018-10-31 02:21:07 +1300
committerMartin Roth <martinroth@google.com>2018-11-01 20:27:52 +0000
commit946d3f9309c1d6d3d5fa057420ceab00b1ed89d1 (patch)
tree344f56b68cf9eee9a91ba74c3134d7a5746d79eb /src/southbridge
parent9a085745f155096c8e6522814e46940ffd49da0c (diff)
downloadcoreboot-946d3f9309c1d6d3d5fa057420ceab00b1ed89d1.tar.xz
sb/intel/lynxpoint: Add a PCI ID for an SMBus controller
The PCI ID was taken from the output of `lspci` on an ASRock H81M-HDS. Change-Id: Idc222392a0973f9ea62b943d18dd762b48c76d17 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/smbus.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index f9deb7d57f..307d7d4b65 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -109,7 +109,10 @@ static struct device_operations smbus_ops = {
.ops_pci = &smbus_pci_ops,
};
-static const unsigned short pci_device_ids[] = { 0x1c22, 0x1e22, 0x9c22, 0 };
+static const unsigned short pci_device_ids[] = {
+ 0x1c22, 0x1e22, 0x8c22, 0x9c22,
+ 0
+};
static const struct pci_driver pch_smbus __pci_driver = {
.ops = &smbus_ops,