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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-10 15:25:26 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-12 11:02:34 +0000 |
| commit | d703c5b1b34a76e8da46b7b4f8646e074f39b14d (patch) | |
| tree | eec2a95863778190ff383445e589c279cf925e0e /src/southbridge | |
| parent | 2178b7286b1fc04d4ce9306b7bab3596fde21bcd (diff) | |
| download | coreboot-d703c5b1b34a76e8da46b7b4f8646e074f39b14d.tar.xz | |
sb/intel/bd82x6x: Make `pch_silicon_supported` static
It's not needed anywhere else.
Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44339
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 7b0662b4fe..82b95f69e4 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -41,7 +41,7 @@ int pch_silicon_type(void) return pch_type; } -int pch_silicon_supported(int type, int rev) +static int pch_silicon_supported(int type, int rev) { int cur_type = pch_silicon_type(); int cur_rev = pch_silicon_revision(); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 68f599d914..eff08581a0 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -42,7 +42,6 @@ int pch_silicon_revision(void); int pch_silicon_type(void); -int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); void enable_usb_bar(void); |