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author | Myles Watson <mylesgw@gmail.com> | 2010-04-14 16:50:16 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2010-04-14 16:50:16 +0000 |
commit | f4cc089f1eb4b8b4a31c4aae63990034f49c5a97 (patch) | |
tree | ea12d7556f87b93bb2697ed68a5703ae30c85175 /src/southbridge | |
parent | 8816cdf3118d9d197c1b56b0ce0ed63cc119dd71 (diff) | |
download | coreboot-f4cc089f1eb4b8b4a31c4aae63990034f49c5a97.tar.xz |
Remove few more warnings and some dead code.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/via/vt8237r/vt8237r_early_smbus.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c index 4dd3678097..aa75f50651 100644 --- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c +++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c @@ -295,9 +295,10 @@ void enable_rom_decode(void) pci_write_config8(dev, 0x41, 0x7f); } +#ifdef CONFIG_NORTHBRIDGE_AMD_K8 /* CN700 doesn't have the support yet */ #define ACPI_IS_WAKEUP_EARLY 1 -int acpi_is_wakeup_early(void) { +static int acpi_is_wakeup_early(void) { device_t dev; u16 tmp; @@ -325,6 +326,7 @@ int acpi_is_wakeup_early(void) { print_debug_hex8(tmp); return ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ; } +#endif #if defined(__GNUC__) void vt8237_early_spi_init(void) |