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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-12-31 12:56:53 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-12-31 12:56:53 +0000
commit1bb68289001f95b49499ac8eb483a7a10e64cc52 (patch)
treec1d60ba92227bc29ef48c0afb273db4825524dd2 /src/southbridge
parent9db833bec394b886ca990965970cdb100b65d9ac (diff)
downloadcoreboot-1bb68289001f95b49499ac8eb483a7a10e64cc52.tar.xz
romcc:
- Set __PRE_RAM__ define per default - Properly handle ignored (#ifdef'd out) #include lines amd/serengeti_cheetah_fam10: - write ACPI files to $(obj) instead of the top dir (alias $(CURDIR)) tinybootblock: - provide a way to define code that should be added to the bootblock, to map the entire ROM for use by CBFS amd/model_fxx, amd/model_10xxx: - add CONFIG_SSE walkcbfs.S: - eliminate the use of two registers, to make space for romcc to wiggle amd/serengeti_cheetah_fam10: - use the enable_rom framework. not entirely functional yet Boot-tested on emulation/qemu-x86 Build-tested on amd/serengeti_cheetah_fam10 amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/Kconfig4
-rw-r--r--src/southbridge/amd/amd8111/bootblock.c6
2 files changed, 10 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig
index b134e23f78..69a2bb27a4 100644
--- a/src/southbridge/amd/amd8111/Kconfig
+++ b/src/southbridge/amd/amd8111/Kconfig
@@ -20,3 +20,7 @@
config SOUTHBRIDGE_AMD_AMD8111
bool
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
+ default "southbridge/amd/amd8111/bootblock.c"
+ depends on SOUTHBRIDGE_AMD_AMD8111
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
new file mode 100644
index 0000000000..72a4903ca9
--- /dev/null
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -0,0 +1,6 @@
+#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
+
+static void bootblock_southbridge_init(void) {
+ /* Setup the rom access for 4M */
+ amd8111_enable_rom();
+}