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authorElyes HAOUAS <ehaouas@noos.fr>2019-02-15 08:21:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-21 19:07:31 +0000
commit26071aaadfc5926f7e01623d8fb2967456041dfc (patch)
tree3380dfb3eec43cfe46e4daa8fca0f8e24e9158d4 /src/southbridge
parent94ad37619f95a07b94a6a9a570bd74727eb830c4 (diff)
downloadcoreboot-26071aaadfc5926f7e01623d8fb2967456041dfc.tar.xz
ACPI: Correct asl_compiler_revision value
Change-Id: I91b54b43c8bb5cb17ff86a6d9afa95f265ee49df Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/agesa/hudson/fadt.c4
-rw-r--r--src/southbridge/amd/cimx/sb800/fadt.c4
-rw-r--r--src/southbridge/amd/pi/hudson/fadt.c4
-rw-r--r--src/southbridge/amd/sb700/fadt.c4
-rw-r--r--src/southbridge/amd/sb800/fadt.c4
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi.c3
-rw-r--r--src/southbridge/intel/i82371eb/fadt.c4
-rw-r--r--src/southbridge/intel/lynxpoint/acpi.c4
-rw-r--r--src/southbridge/nvidia/ck804/fadt.c3
-rw-r--r--src/southbridge/nvidia/mcp55/fadt.c3
10 files changed, 27 insertions, 10 deletions
diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index e8483a045c..8a3f19fe05 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -22,6 +22,8 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
+#include <version.h>
+
#include "hudson.h"
#include "smi.h"
@@ -53,7 +55,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c
index 15e05c398e..5823813011 100644
--- a/src/southbridge/amd/cimx/sb800/fadt.c
+++ b/src/southbridge/amd/cimx/sb800/fadt.c
@@ -24,6 +24,8 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
+#include <version.h>
+
#include "SBPLATFORM.h"
#ifndef FADT_BOOT_ARCH
@@ -57,7 +59,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
if ((uintptr_t)facs > 0xffffffff)
printk(BIOS_DEBUG, "ACPI: FACS lives above 4G\n");
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c
index c2d5d19ddb..21c093080a 100644
--- a/src/southbridge/amd/pi/hudson/fadt.c
+++ b/src/southbridge/amd/pi/hudson/fadt.c
@@ -22,6 +22,8 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
+#include <version.h>
+
#include "hudson.h"
#include "smi.h"
@@ -53,7 +55,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 8dd0c01f4b..d5c17576cb 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -24,6 +24,8 @@
#include <arch/io.h>
#include <device/device.h>
#include <cpu/amd/powernow.h>
+#include <version.h>
+
#include "sb700.h"
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
@@ -40,7 +42,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c
index ce64036f6c..ce279814cb 100644
--- a/src/southbridge/amd/sb800/fadt.c
+++ b/src/southbridge/amd/sb800/fadt.c
@@ -24,6 +24,8 @@
#include <arch/io.h>
#include <device/device.h>
#include <cpu/amd/powernow.h>
+#include <version.h>
+
#include "sb800.h"
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
@@ -40,7 +42,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c
index 96ddea5be6..0aebb20cd4 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi.c
+++ b/src/southbridge/intel/fsp_rangeley/acpi.c
@@ -20,6 +20,7 @@
#include <arch/acpi.h>
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <arch/io.h>
+#include <version.h>
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
#include <cpu/x86/smm.h>
@@ -52,7 +53,7 @@ void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 1;
+ header->asl_compiler_revision = asl_revision;
/* ACPI Pointers */
fadt->firmware_ctrl = (unsigned long) facs;
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c
index 2a3a18a0f3..32ae9ffea8 100644
--- a/src/southbridge/intel/i82371eb/fadt.c
+++ b/src/southbridge/intel/i82371eb/fadt.c
@@ -22,6 +22,8 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <version.h>
+
#include "i82371eb.h"
/**
@@ -44,7 +46,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 42;
+ header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (uintptr_t)facs;
fadt->dsdt = (uintptr_t)dsdt;
diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c
index 7f6a5ad3d2..8d4c4e6e84 100644
--- a/src/southbridge/intel/lynxpoint/acpi.c
+++ b/src/southbridge/intel/lynxpoint/acpi.c
@@ -19,6 +19,8 @@
#include <cbmem.h>
#include <types.h>
#include <string.h>
+#include <version.h>
+
#include "pch.h"
#include "nvs.h"
@@ -77,7 +79,7 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
memcpy(&ssdt->oem_table_id, "SERIALIO", 8);
ssdt->oem_revision = 43;
memcpy(&ssdt->asl_compiler_id, ASLC, 4);
- ssdt->asl_compiler_revision = 42;
+ ssdt->asl_compiler_revision = asl_revision;
ssdt->length = sizeof(acpi_header_t);
acpigen_set_current((char *) current);
diff --git a/src/southbridge/nvidia/ck804/fadt.c b/src/southbridge/nvidia/ck804/fadt.c
index fb4cbb6fcc..ea937899d3 100644
--- a/src/southbridge/nvidia/ck804/fadt.c
+++ b/src/southbridge/nvidia/ck804/fadt.c
@@ -20,6 +20,7 @@
#include <string.h>
#include <console/console.h>
#include <arch/acpi.h>
+#include <version.h>
extern unsigned pm_base; /* pm_base should be set in sb acpi */
@@ -42,7 +43,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 0;
+ header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32)facs;
fadt->dsdt = (u32)dsdt;
diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c
index f1d6e9da1f..5b00861264 100644
--- a/src/southbridge/nvidia/mcp55/fadt.c
+++ b/src/southbridge/nvidia/mcp55/fadt.c
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <device/device.h>
#include <device/pci_ids.h>
+#include <version.h>
extern unsigned pm_base;
@@ -43,7 +44,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 42;
+ header->asl_compiler_revision = asl_revision;
printk(BIOS_INFO, "ACPI: pm_base: %u...\n", pm_base);