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authorTristan Corrick <tristan@corrick.kiwi>2018-10-31 02:26:19 +1300
committerNico Huber <nico.h@gmx.de>2018-11-01 22:22:43 +0000
commit655ef61937ccd65c19e8ddeb3da1dd40c8238cf7 (patch)
treeb96ea2986cc159b4d6c9bfda5c12ee6b3aef872c /src/southbridge
parentf3127d4af71715bfa9e656b1187a3ba544ac8780 (diff)
downloadcoreboot-655ef61937ccd65c19e8ddeb3da1dd40c8238cf7.tar.xz
sb/intel/lynxpoint: Provide a function for mainboard super I/O config
The super I/O setup needs to be done after the LPC is enabled. For Lynx Point, configuring the super I/O in `mainboard_romstage_entry()` is too early to get a serial console output. To remedy this, add a function `mainboard_config_superio()` that will be called at the appropriate time, and can be overridden by mainboard code. Change-Id: Iaf4188a17533c636e7b0c7efa220bc6a25876dda Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29382 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c6
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h1
2 files changed, 7 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 8e11f10e9a..27a3b2954c 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -124,6 +124,10 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, config->gen4_dec);
}
+void __weak mainboard_config_superio(void)
+{
+}
+
int early_pch_init(const void *gpio_map,
const struct rcba_config_instruction *rcba_config)
{
@@ -139,6 +143,8 @@ int early_pch_init(const void *gpio_map,
setup_pch_gpios(gpio_map);
#endif
+ mainboard_config_superio();
+
console_init();
pch_generic_setup();
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 489b565aef..1e59479561 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -206,6 +206,7 @@ int early_spi_read(u32 offset, u32 size, u8 *buffer);
int early_pch_init(const void *gpio_map,
const struct rcba_config_instruction *rcba_config);
void pch_enable_lpc(void);
+void mainboard_config_superio(void);
#endif /* !__PRE_RAM__ && !__SMM__ */
#endif /* __ASSEMBLER__ */