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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-18 16:43:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-21 09:05:43 +0000
commit6de151e765a6f67d5195a251bbb1a23dcaca6ce0 (patch)
treedb92108ee04df560d103e1edcb895e9749eadbd8 /src/southbridge
parent422807387ba50719f73ed4627c0f8c6796a47e0f (diff)
downloadcoreboot-6de151e765a6f67d5195a251bbb1a23dcaca6ce0.tar.xz
sb/lynxpoint: Fix 'dead increment'
Dead increment spotted out using clang-tools. Change-Id: I631524b9346647048fe8ea30387553a5b4651f59 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36129 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c2
-rw-r--r--src/southbridge/intel/lynxpoint/sata.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 4b44759139..a1e026200b 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -403,7 +403,7 @@ static void enable_hpet(struct device *const dev)
reg32 &= ~(3 << 0);
RCBA32(HPTC) = reg32;
/* Read it back to stick. It's affected by posted write syndrome. */
- reg32 = RCBA32(HPTC);
+ RCBA32(HPTC);
}
static void enable_clock_gating(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index aae48e7426..75bfbde2dd 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -144,7 +144,7 @@ static void sata_init(struct device *dev)
/* Setup register 9Ch */
reg16 = 0; /* Disable alternate ID */
- reg16 = 1 << 5; /* BWG step 12 */
+ reg16 |= (1 << 5); /* BWG step 12 */
pci_write_config16(dev, 0x9c, reg16);
/* SATA Initialization register */