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| author | Furquan Shaikh <furquan@google.com> | 2020-04-30 19:19:33 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-05-02 20:41:39 +0000 |
| commit | c0bff9755f12a6de9b15faf1498a096cf699d310 (patch) | |
| tree | c6a8cff1f683f0f93c94788e14e4364e6ba1df4a /src/southbridge | |
| parent | 56a5ebf48d648f0df4bf338c441a79968734e5a5 (diff) | |
| download | coreboot-c0bff9755f12a6de9b15faf1498a096cf699d310.tar.xz | |
acpi: Update sata files to be more aligned with rest of acpi files
This change moves sata.h to include/acpi/acpi_sata.h to align with the
rest of the acpi header files in include/acpi.
BUG=b:155428745
Change-Id: I3f97e5c12535a331d7347c0ecad00b07b5f13f37
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/sata.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/sata.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index e65fd6ecae..57eb7e75a1 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -8,7 +8,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <option.h> -#include <acpi/sata.h> +#include <acpi/acpi_sata.h> #include <types.h> #include "chip.h" diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 11ac078c83..df13989f4a 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -8,7 +8,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <option.h> -#include <acpi/sata.h> +#include <acpi/acpi_sata.h> #include <types.h> #include "chip.h" |