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authorAntonello Dettori <dev@dettori.io>2016-11-08 18:44:46 +0100
committerMartin Roth <martinroth@google.com>2016-11-09 23:48:14 +0100
commitcc026798cebbfef2f9714453c99ec4ce5c4b42bb (patch)
tree7603ec9be69ed9ced37fc70ccd6e50959089b108 /src/southbridge
parent35e30f753f74b218afc4d29381fa2bb3eb8929b2 (diff)
downloadcoreboot-cc026798cebbfef2f9714453c99ec4ce5c4b42bb.tar.xz
southbridge/intel/i82801dx: transition away from device_t
Replace the use of the old device_t definition inside southbridge/intel/i82801dx. Change-Id: I32888930d3742432a73dfc0a32c6586186e6757c Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/17297 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801dx/tco_timer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801dx/tco_timer.c b/src/southbridge/intel/i82801dx/tco_timer.c
index 2d5155da8f..e773fa47d7 100644
--- a/src/southbridge/intel/i82801dx/tco_timer.c
+++ b/src/southbridge/intel/i82801dx/tco_timer.c
@@ -17,7 +17,7 @@
static void i82801dx_halt_tco_timer(void)
{
/* Set the LPC device statically. */
- device_t dev = PCI_DEV(0x0, 0x1f, 0x0);
+ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x0);
/* Temporarily set ACPI base address (I/O space). */
pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));