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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-19 15:03:17 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-20 09:25:26 +0000 |
| commit | ee424e5941a526d354409d943bae374c8b59d68a (patch) | |
| tree | 6688a7e03cc6b913d8f8879f0f9908c250e49152 /src/southbridge | |
| parent | 0d7c7a84e7b53702e0ff2b7c8e8598dddc6a9e4b (diff) | |
| download | coreboot-ee424e5941a526d354409d943bae374c8b59d68a.tar.xz | |
sb/amd/common: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: Ie16a1c131ec41eeccc0bf5235b3fc2341095d4a8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/common/amd_pci_util.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/common/amd_pci_util.c b/src/southbridge/amd/common/amd_pci_util.c index b6b2bd3718..2acd151252 100644 --- a/src/southbridge/amd/common/amd_pci_util.c +++ b/src/southbridge/amd/common/amd_pci_util.c @@ -94,8 +94,8 @@ void write_pci_int_table (void) */ void write_pci_cfg_irqs(void) { - device_t dev = NULL; /* Our current device to route IRQs to */ - device_t target_dev = NULL; /* The bridge that a device may be connected to */ + struct device *dev = NULL; /* Our current device to route IRQs to */ + struct device *target_dev = NULL; /* The bridge that a device may be connected to */ u16 int_pin = 0; /* Value of the INT_PIN register 0x3D */ u16 target_pin = 0; /* Pin we will search our tables for */ u16 int_line = 0; /* IRQ number read from PCI_INTR table and programmed to INT_LINE reg 0x3C */ |