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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-16 18:39:26 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-02 07:39:01 +0000 |
| commit | 10b65dcfc76f62bf97c93f4a8e51a2269e5c040e (patch) | |
| tree | 119b6be4ae51bc97dc6f66c37d7a11fa39d2409a /src/southbridge | |
| parent | 4ad1446b8333b258110d275c58d17b2d9ebbfa23 (diff) | |
| download | coreboot-10b65dcfc76f62bf97c93f4a8e51a2269e5c040e.tar.xz | |
src/sb: Fix non-local header treated as local
Remove some unneeded includes.
Change-Id: I4b9bcb74b6441db9e44fe471b9cd789e42e7093a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_rcba.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_usb.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smihandler.c | 2 |
4 files changed, 4 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 4015495e4e..1254a16dc0 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <string.h> #include <arch/io.h> #include <cbmem.h> @@ -26,7 +25,7 @@ #include "pch.h" /* For DMI bar. */ -#include "northbridge/intel/sandybridge/sandybridge.h" +#include <northbridge/intel/sandybridge/sandybridge.h> #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0) diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 9bd3a26e22..443b6c20bf 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -16,8 +16,8 @@ */ #include <stdint.h> +#include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" -#include "northbridge/intel/sandybridge/sandybridge.h" void southbridge_configure_default_intmap(void) diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index a036858d04..8df4a00f1b 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -15,10 +15,9 @@ */ #include <arch/io.h> -#include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> -#include "northbridge/intel/sandybridge/sandybridge.h" /* For DEFAULT_RCBABASE. */ +#include <northbridge/intel/sandybridge/sandybridge.h> /* For DEFAULT_RCBABASE. */ #include "pch.h" void diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index 380c241b62..8e2f603cb5 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -31,7 +31,7 @@ * 1. the chipset can do it * 2. we don't need to worry about how we leave 0xcf8/0xcfc behind */ -#include "northbridge/intel/nehalem/nehalem.h" +#include <northbridge/intel/nehalem/nehalem.h> #include <southbridge/intel/common/gpio.h> #include <arch/io.h> |