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authorEric Biederman <ebiederm@xmission.com>2003-07-21 20:13:45 +0000
committerEric Biederman <ebiederm@xmission.com>2003-07-21 20:13:45 +0000
commit2c018fba95a5f40c4eaaa20421e8c893dffdb62e (patch)
tree3b6ecc6eb72d145dd70bb549fe0130370d7e40fb /src/southbridge
parent6d4512cdf976fc071720dbec686cf8a1a40f1db0 (diff)
downloadcoreboot-2c018fba95a5f40c4eaaa20421e8c893dffdb62e.tar.xz
- First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP) - Minor tweaks to romcc to keep it from taking forever compiling - failover fixes - Get a good implementation of k8_cpufixup and sizeram for the opteron git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_lpc.c8
-rw-r--r--src/southbridge/amd/amd8111/amd8111_usb2.c38
2 files changed, 46 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index 643b84cad9..b78b55bc88 100644
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -87,6 +87,7 @@ static void setup_ioapic(void)
static void lpc_init(struct device *dev)
{
uint8_t byte;
+ uint16_t word;
int pwr_on=-1;
printk_debug("lpc_init\n");
@@ -101,6 +102,13 @@ static void lpc_init(struct device *dev)
byte = pci_read_config8(dev, 0x46);
pci_write_config8(dev, 0x46, byte | (1<<0));
+//BY LYH
+ /* Disable AC97 and Ethernet */
+ word = pci_read_config16(dev, 0x48);
+ pci_write_config16(dev, 0x48, word & ~((1<<5)|(1<<6)|(1<<9)));
+//BY LYH END
+
+
/* power after power fail */
byte = pci_read_config8(dev, 0x43);
if (pwr_on) {
diff --git a/src/southbridge/amd/amd8111/amd8111_usb2.c b/src/southbridge/amd/amd8111/amd8111_usb2.c
new file mode 100644
index 0000000000..5c680ba0ad
--- /dev/null
+++ b/src/southbridge/amd/amd8111/amd8111_usb2.c
@@ -0,0 +1,38 @@
+//2003 Copywright Tyan
+//BY LYH
+
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+
+static void usb2_init(struct device *dev)
+{
+ uint32_t cmd;
+
+ printk_debug("USB: Setting up controller.. ");
+ cmd = pci_read_config32(dev, PCI_COMMAND);
+ pci_write_config32(dev, PCI_COMMAND,
+ cmd | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+ PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE);
+
+
+ printk_debug("done.\n");
+
+}
+
+static struct device_operations usb_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .init = usb2_init,
+ .scan_bus = 0,
+};
+
+static struct pci_driver usb2_driver __pci_driver = {
+ .ops = &usb_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_AMD_8111_USB2,
+};
+