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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-09 16:51:34 +0300 |
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committer | Martin Roth <martinroth@google.com> | 2018-01-23 05:33:30 +0000 |
commit | 9de8ab9acec90d36aa23c63f3f46bca3b628d0f6 (patch) | |
tree | 0b66c71eb88ee5fe5a972e01f7d88abd13959ee6 /src/southbridge | |
parent | 1758fd2a32408b9206c41b8e71300494ee53f886 (diff) | |
download | coreboot-9de8ab9acec90d36aa23c63f3f46bca3b628d0f6.tar.xz |
AGESA_LEGACY: Apply final cleanup and file removals
With no boards left using AGESA_LEGACY, wipe out remains
of that everywhere in the tree.
Change-Id: I0ddc1f400e56e42fe8a43b4766195e3a187dcea6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index c4cbd20f54..393eda0090 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -464,15 +464,14 @@ static void sb800_enable(device_t dev) case (0x16 << 3) | 2: /* 0:16:2 EHCI-USB3 */ sb_config->USBMODE.UsbMode.Ehci3 = dev->enabled; -#if 1 /* FIXME: IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) */ - /* call the CIMX entry at the last sb800 device, + /* FIXME: Find better callsites for these. + * call the CIMX entry at the last sb800 device, * so make sure the mainboard devicetree is complete */ if (!acpi_is_wakeup_s3()) sb_Before_Pci_Init(); else sb_Before_Pci_Restore_Init(); -#endif break; default: |