- Bump the LinuxBIOS major version

- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 57 insertions, 36 deletions

diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c
index 2fb62e1c93..a0732d05f2 100644
--- a/src/superio/NSC/pc97307/superio.c
+++ b/src/superio/NSC/pc97307/superio.c
@@ -4,44 +4,41 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include "chip.h"
+#include "pc97307.h"
 
-void pnp_output(char address, char data)
-{
-	outb(address, PNP_CFGADDR);
-	outb(data, PNP_CFGDATA);
-}
-
-void sio_enable(struct chip *chip, enum chip_pass pass)
+static void init(device_t dev)
 {
+	struct superio_NSC_pc97307_config *conf;
+	struct resource *res0, *res1;
 
-	unsigned char reg;
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip;
+	switch(dev->path.u.pnp.device) {
+	case PC97307_SP1:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
 
-	switch (pass) {
-	case CONF_PASS_PRE_PCI:
-		printk_info("Configuring PC97307...\n");
+	case PC97307_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
 
+	case PC97307_KBCK:
 		/* Enable keyboard */
-		pnp_output(0x07, 0x00);
-		pnp_output(0x30, 0x00); /* Disable keyboard */
-		pnp_output(0xf0, 0x40); /* Set KBC clock to 8 Mhz */
-		pnp_output(0x30, 0x01); /* Enable keyboard */
-
-		/* Enable mouse */
-		pnp_output(0x07, 0x01);
-		pnp_output(0x30, 0x01);
-
-		/* Enable rtc */
-		pnp_output(0x07, 0x02);
-		pnp_output(0x30, 0x01);
+		pnp_set_logical_device(dev);
+		pnp_set_enable(dev, 0); /* Disable keyboard */
+		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
+		pnp_set_enable(dev, 1); /* Enable keyboard */
 
-		/* Enable fdc */
-		pnp_output(0x07, 0x03);
-		pnp_output(0x30, 0x01);
-
-		/* Enable parallel port */
-		pnp_output(0x07, 0x04);
-		pnp_output(0x30, 0x01);
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
 
+	case PC97307_FDC:
 		/* Set up floppy in PS/2 mode */
 		outb(0x09, SIO_CONFIG_RA);
 		reg = inb(SIO_CONFIG_RD);
@@ -49,13 +46,37 @@ void sio_enable(struct chip *chip, enum chip_pass pass)
 		outb(reg, SIO_CONFIG_RD);
 		outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
 		break;
-	default:
-		/* nothing yet */
-		break;
+
 	}
 }
 
-struct chip_control superio_NSC_pc97307_control = {
-	enable: sio_enable,
-	name:   "NSC 97307"
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+ { &ops, PC97307_KBCM, PNP_IRQ0 },
+ { &ops, PC97307_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+ { &ops, PC97307_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+ { &ops, PC97307_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+ { &ops, PC97307_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+ { &ops, PC97307_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+ { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
+ { &ops, PC97307_PM,   PNP_IO0, { 0xfffe, 0 } },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_device(dev, &pnp_ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_NSC_pc97307_control = {
+	.enable_dev = enable_dev,
+	.name       =  "NSC 97307"
 };