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| author | BryantOu <Bryant.Ou.Q@gmail.com> | 2020-04-17 02:15:17 -0700 |
|---|---|---|
| committer | Andrey Petrov <andrey.petrov@gmail.com> | 2020-04-29 16:06:02 +0000 |
| commit | ab90782e7220d188e916680da21b49a011208f3f (patch) | |
| tree | 3574f4b6a6badf8e4f85c4a1a6d204d1075997d7 /src/superio/aspeed/Makefile.inc | |
| parent | 60e0dc3919324ae7a5c3f2766790b0c76c39f25c (diff) | |
| download | coreboot-ab90782e7220d188e916680da21b49a011208f3f.tar.xz | |
superio/aspeed/common: Add early configure functions
Add LPC read/write functions for access aspeed's memory, also
create config data table to config memory and SIO. These
functions are used at early stages to configure devices.
Signed-off-by: Bryant Ou <Bryant.Ou.Q@gmail.com>
Change-Id: Ib59c29a042b2c7bf196b8a5bd5218704d8075855
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40483
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio/aspeed/Makefile.inc')
| -rw-r--r-- | src/superio/aspeed/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/superio/aspeed/Makefile.inc b/src/superio/aspeed/Makefile.inc index 769334e8d8..2810c077c9 100644 --- a/src/superio/aspeed/Makefile.inc +++ b/src/superio/aspeed/Makefile.inc @@ -4,6 +4,8 @@ ## include generic fintek pre-ram stage driver romstage-$(CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM) += common/early_serial.c bootblock-$(CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM) += common/early_serial.c +bootblock-$(CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM) += common/early_config.c + subdirs-y += ast2400 subdirs-y += common |