diff options
author | Nicola Corna <nicola@corna.info> | 2017-03-02 08:08:45 +0100 |
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committer | Martin Roth <martinroth@google.com> | 2017-03-27 19:19:56 +0200 |
commit | 2fca86f370429272fa9deb0ff7d18c87f224e032 (patch) | |
tree | 04cf707cbc7039e6772c8a087aee0970e91976f2 /src/superio/fintek/f71808a/f71808a.h | |
parent | 50db9c99be7e09aafb7cfd353bd0ac9878b76fca (diff) | |
download | coreboot-2fca86f370429272fa9deb0ff7d18c87f224e032.tar.xz |
superio/fintek: Add support for Fintek F71808A
This chip is similar to the Fintek F71869AD.
Change-Id: Iba3f3dadf2b15071981f52d0b08da7847354bd23
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18563
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/fintek/f71808a/f71808a.h')
-rw-r--r-- | src/superio/fintek/f71808a/f71808a.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/superio/fintek/f71808a/f71808a.h b/src/superio/fintek/f71808a/f71808a.h new file mode 100644 index 0000000000..fbce494224 --- /dev/null +++ b/src/superio/fintek/f71808a/f71808a.h @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Nicola Corna <nicola@corna.info> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SUPERIO_FINTEK_F71808A_H +#define SUPERIO_FINTEK_F71808A_H + +/* Logical Device Numbers (LDN). */ +#define F71808A_SP1 0x01 /* UART1 */ +#define F71808A_HWM 0x04 /* Hardware monitor */ +#define F71808A_KBC 0x05 /* PS/2 keyboard and mouse */ +#define F71808A_GPIO 0x06 /* General Purpose I/O (GPIO) */ +#define F71808A_WDT 0x07 /* WDT */ +#define F71808A_CIR 0x08 /* CIR */ +#define F71808A_PME 0x0a /* Power Management Events (PME) and ACPI */ + +#endif /* SUPERIO_FINTEK_F71808A_H */ |