Fintek and Intel i3100 Super I/O cleanups.

 - Drop commented out "config chip.h" and a duplicate link to a datasheet.

 - F71805F -> F71805F/FG, to mention all variants.
 
 - Use u8/u16/ etc. everywhere.
 
 - Add a missing (C) line.
 
 - Fix up a bunch of pnp_dev_info[] structs according to the datasheets.
 
 - Fintek F71889: Drop res1/PNP_IO1 from KBC, there's no 0x62/0x63 register
   pair on this Super I/O.
   
 - Fintek F71863FG: This Super I/O _does_ have a keyboard/mouse LDN, add the
   respective code in superio.c. Also: Add missing LDNs to f71863fg.h.
   
 - i3100: Add some more comments and datasheet infos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 23 insertions, 15 deletions

diff --git a/src/superio/fintek/f71863fg/chip.h b/src/superio/fintek/f71863fg/chip.h
index f6cf24985e..0fea0a30d1 100644
--- a/src/superio/fintek/f71863fg/chip.h
+++ b/src/superio/fintek/f71863fg/chip.h
@@ -18,13 +18,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <pc80/keyboard.h>
 #include <device/device.h>
 #include <uart8250.h>
 
-/* This chip doesn't have keyboard and mouse support. */
-
 extern struct chip_operations superio_fintek_f71863fg_ops;
 
 struct superio_fintek_f71863fg_config {
 	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
 };
diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h
index bd67b24669..487f76854d 100644
--- a/src/superio/fintek/f71863fg/f71863fg.h
+++ b/src/superio/fintek/f71863fg/f71863fg.h
@@ -22,8 +22,10 @@
 #define F71863FG_FDC	0x00	/* Floppy */
 #define F71863FG_SP1	0x01	/* UART1 */
 #define	F71863FG_SP2	0x02	/* UART2 */
-#define F71863FG_PP	0x03	/* Parallel Port */
-#define	F71863FG_HWM	0x04	/* Hardware Monitor */
-#define	F71863FG_KBC	0x05	/* KBC devices  */
+#define F71863FG_PP	0x03	/* Parallel port */
+#define	F71863FG_HWM	0x04	/* Hardware monitor */
+#define	F71863FG_KBC	0x05	/* PS/2 keyboard and mouse */
 #define	F71863FG_GPIO	0x06	/* General Purpose I/O (GPIO) */
-#define	F71863FG_PME	0x0a	/* Power Management Events (PME) */
+#define	F71863FG_VID	0x07	/* VID */
+#define	F71863FG_SPI	0x08	/* SPI */
+#define	F71863FG_PME	0x0a	/* Power Management Events (PME) and ACPI */
diff --git a/src/superio/fintek/f71863fg/f71863fg_early_serial.c b/src/superio/fintek/f71863fg/f71863fg_early_serial.c
index 35daa399b9..7eeb06aef0 100644
--- a/src/superio/fintek/f71863fg/f71863fg_early_serial.c
+++ b/src/superio/fintek/f71863fg/f71863fg_early_serial.c
@@ -23,19 +23,19 @@
 #include <arch/romcc_io.h>
 #include "f71863fg.h"
 
-static inline void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(device_t dev)
 {
-	unsigned int port = dev >> 8;
+	u16 port = dev >> 8;
 	outb(0x87, port);
 }
 
 static void pnp_exit_conf_state(device_t dev)
 {
-	unsigned int port = dev >> 8;
+	u16 port = dev >> 8;
 	outb(0xaa, port);
 }
 
-static void f71863fg_enable_serial(device_t dev, unsigned int iobase)
+static void f71863fg_enable_serial(device_t dev, u16 iobase)
 {
 	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c
index e41c050047..e5d140859a 100644
--- a/src/superio/fintek/f71863fg/superio.c
+++ b/src/superio/fintek/f71863fg/superio.c
@@ -18,7 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
@@ -56,6 +55,10 @@ static void f71863fg_init(device_t dev)
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
+	case F71863FG_KBC:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		pc_keyboard_init(&conf->keyboard);
+		break;
 	}
 }
 
@@ -91,12 +94,15 @@ static struct device_operations ops = {
 
 static struct pnp_info pnp_dev_info[] = {
 	/* TODO: Some of the 0x7f8 etc. values may not be correct. */
-	{ &ops, F71863FG_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, F71863FG_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
 	{ &ops, F71863FG_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 	{ &ops, F71863FG_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-	{ &ops, F71863FG_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-	{ &ops, F71863FG_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
-	{ &ops, F71863FG_GPIO, PNP_IRQ0, },
+	{ &ops, F71863FG_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
+	{ &ops, F71863FG_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
+	{ &ops, F71863FG_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, },
+	{ &ops, F71863FG_GPIO, },
+	{ &ops, F71863FG_VID,  PNP_IO0, { 0x07f8, 0 }, },
+	{ &ops, F71863FG_SPI, },
 	{ &ops, F71863FG_PME, },
 };