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authorElyes HAOUAS <ehaouas@noos.fr>2020-03-30 16:44:54 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-03-31 18:59:08 +0000
commit8dcadc9189d538dfcc0d8247bcd027afd5697244 (patch)
treef8163fe7eeb54c7c4d1ff6c771b473d7864e71c1 /src/superio/fintek/f71869ad
parent3e666898cd99f4e15a39e360bb594d499e738b2d (diff)
downloadcoreboot-8dcadc9189d538dfcc0d8247bcd027afd5697244.tar.xz
superio/fintek: Improve code formatting
Change-Id: I5ae2a2da1994fcc587540586d7404ebf18eb2ca0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/superio/fintek/f71869ad')
-rw-r--r--src/superio/fintek/f71869ad/f71869ad.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
index d038c3d9e5..e4e2f27f90 100644
--- a/src/superio/fintek/f71869ad/f71869ad.h
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -5,15 +5,15 @@
#define SUPERIO_FINTEK_F71869AD_H
/* Logical Device Numbers (LDN). */
-#define F71869AD_FDC 0x00 /* Floppy */
-#define F71869AD_SP1 0x01 /* UART1 */
-#define F71869AD_SP2 0x02 /* UART2 */
-#define F71869AD_PP 0x03 /* Parallel port */
-#define F71869AD_HWM 0x04 /* Hardware monitor */
-#define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */
-#define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */
-#define F71869AD_WDT 0x07 /* WDT */
-#define F71869AD_CIR 0x08 /* CIR */
-#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
+#define F71869AD_FDC 0x00 /* Floppy */
+#define F71869AD_SP1 0x01 /* UART1 */
+#define F71869AD_SP2 0x02 /* UART2 */
+#define F71869AD_PP 0x03 /* Parallel port */
+#define F71869AD_HWM 0x04 /* Hardware monitor */
+#define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */
+#define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */
+#define F71869AD_WDT 0x07 /* WDT */
+#define F71869AD_CIR 0x08 /* CIR */
+#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
#endif /* SUPERIO_FINTEK_F71869AD_H */